LAPIS Semiconductor ML610421, User Manual, Page: 365 / 437

ML610Q421/ML610Q422/ML610421 User’s Manual
Chapter 26 LCD Drivers
26 – 27
26.3.3 Segment Mapping When the Programmable Display Allocation Function is Used
When the programmable display allocation function is used (DASN bit of DSPMOD1 register is “1”), display registers
(DSPR00 to 71) segment mapping can be set in bit units according to the contents of display allocation registers A and B
(DSmCnA, DSmCnB: m = 0 to 49, n = 0 to 7).
Table 26-7 shows the frame frequencies and the duty conditions that allow the use of the programmable allocation
function.
Table 26-6 Conditions That Allow the Use of Programmable Allocation Function
Frame frequency Duty that allows the use of duty
Approx. 64 Hz 1/1 to 1/8 Duty
Approx. 73 Hz 1/1 to 1/8 Duty
Approx. 85 Hz 1/1 to 1/7 Duty
Approx. 102 Hz 1/1 to 1/6 Duty
Note:
- When the duty is other than those indicated in Table 26-6, the programmable allocation function can not be used
regardless of the content of the DASN bit of DSPMOD1. The programmable display allocation function is available only
when 1/1~1/8 duty is selected (when using eight COMs or less for display), it does not work when 1/9~1/16 duty is
selected (when using nine COMs or more for display).
- Select type 3 for the display register segment map (Set DADM1 bit of DSPMOD1 register to “1”) when using the
programmable allocation function.
Figure 26-8 shows the configuration when using the programmable display allocation function.
Figure 26-8 Configuration When Using the Programmable Display Allocation Function
Data bus
Display allocation register A
DS0C0A
DS1C0A
DS2C0A
DS49C7A
DS48C7A
Mapping specification of SEG0-COM0
Mapping specification of SEG63-COM7
Mapping specification of SEG1-COM0
Mapping specification of SEG2-COM0
Mapping specification of SEG62-COM7
Display allocation register B
Display register
DS0C0B
DS1C0B
DS2C0B
DS49C7B
DS48C7B
DSPR71
|
DSPR00
Selector
8
8
3
Segment
drivers
1
SEG0
SEG1
SEG2
SEG48
SEG49
Specifies a bit of
a display register
0F600H
0F601H
0F602H
0F7FFH
0F7FEH
0F400H
0F401H
0F402H
0F5F1H
0F5F0H
Specifies the
addresses of a
display register