LAPIS Semiconductor ML610421, User Manual, Page: 374 / 437

ML610Q421/ML610Q422/ML610421 User’s Manual
Chapter 27 Battery Level Detector
27 – 3
27.2.2 Battery Level Detector Control Register 0 (BLDCON0)
Address: 0F0D0H
Access: R/W
Access size: 8 bits
Initial value: 00H
7 6 5 4 3 2 1 0
BLDCON0
   
LD3 LD2 LD1 LD0
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial value 0 0 0 0 0 0 0 0
BLDCON0 is a special function register (SFR) to control the Battery Level Detector
[Description of Bits]
•
LD3, LD2, LD1, LD0 (bits 3-0)
The LD3, LD2, LD1, and LD0 bits are used to select a threshold voltage (VCMP) of the Battery Level Detector. 16
levels of threshold voltages can be selected.
LD3 LD2 LD1 LD0 Description
0 0 0 0 1.35 V
±
2% (initial value)
0 0 0 1 1.40 V
±
2%
0 0 1 0 1.45 V
±
2%
0 0 1 1 1.50 V
±
2%
0 1 0 0 1.60 V
±
2%
0 1 0 1 1.70 V
±
2%
0 1 1 0 1.80 V
±
2%
0 1 1 1 1.90 V
±
2%
1 0 0 0 2.00 V
±
2%
1 0 0 1 2.10 V
±
2%
1 0 1 0 2.20 V
±
2%
1 0 1 1 2.30 V
±
2%
1 1 0 0 2.40 V
±
2%
1 1 0 1 2.50 V
±
2%
1 1 1 0 2.70 V
±
2%
1 1 1 1 2.90 V
±
2%