LAPIS Semiconductor ML610421, User Manual, Page: 127 / 437

ML610Q421/ML610Q422/ML610421 User’s Manual
Chapter 8 Capture
8 – 6
8.2.5 Capture Data Register 1 (CAPR1)
Address: 0F093H
Access: R/W
Access size: 8 bits
Initial value: 00H
7 6 5 4 3 2 1 0
CAPR1 CP17 CP16 CP15 CP14 CP13 CP12 CP11 CP10
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial value 0 0 0 0 0 0 0 0
CAPR1 is a register in which capture data is stored.
The T4KHZ to T32HZ signals of the low-speed time base counter (LTBC) are captured when the P01 interrupt request
is generated with the CAPF1 flag (bit 1 of the CAPSTAT register) set to "0".
Writing to CAPR1 sets the CAPF1 flag of CAPSTAT to "0". The value of CAPR1 does not change even if data is
written to it.