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APB peripheral reset register 2 (RCM_APBRST2)
Offset address: 0x0C
Reset value: 0x0000 0000
Access: Access in the form of word, half word and byte, without wait cycle.
All bits can be reset or cleared by software.
Field
Name
R/W
Description
0
SYSCFG
R/W
SYSCFG Reset
0: No effect
1: Reset
4:1
Reserved
5
USART6
R/W
USART6 Reset
0: No effect
1: Reset
8:6
Reserved
9
ADC
R/W
ADC Reset
0: No effect
1: Reset
10
Reserved
11
TMR1
R/W
TMR1 Timer Reset
0: No effect
1: Reset
12
SPI1
R/W
SPI1 Reset
0: No effect
1: Reset
13
Reserved
14
USART1
R/W
USART1 Reset
0: No effect
1: Reset
15
Reserved
16
TMR15
R/W
TMR15 Reset
0: No effect
1: Reset
17
TMR16
R/W
TMR16 Reset
0: No effect
1: Reset
18
TMR17
R/W
TMR17 Reset
0: No effect
1: Reset
21:19
Reserved
22
DBG
R/W
Debug Reset
0: No effect
1: Reset
31:23
Reserved