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25
Cyclic Redundancy Check Computing Unit (CRC)
25.1
Introduction
The cyclic redundancy check (CRC) computing unit can get 8/16/32-bit CRC
computing result by calculating the input data through a fixed generator
polynomial, which is mainly used to detect or verify the correctness and integrity
of the data after transmission or saving.
25.2
Functional Description
Calculation Method
Use CRC-32 (Ethernet) polynomial: 0x4C11DB7
（
X
32
+X
26
+X
23
+X
22
+X
16
+X
12
+X
11
+X
10
+X
8
+X
7
+X
5
+X
4
+X
2
+X+1
）
Calculation Time
The calculation time is four AHB clock cycles.
Functional Characteristics
Handle 8-bit, 16-bit and 32-bit data
Programmable CRC initial value
Independent 32-bit input and output register
Reversible option of I/O data
The data width can be dynamically adjusted to reduce the number of
times of calculating and writing
The high and low levels of input data can be reversed in order to adapt
to different little-endian and big-endian systems
Word or byte calculation can be performed, depending on the different
data formats written.
Have data buffer to reduce wait cycles
Every time a new data is written, the result will be a combination of the last
calculation result and the new calculation result. (Execute operation for the
whole word). Write operation of CPU will be suspended during calculation, so
that "Back-to-back" write or continuous "read" -"write" operation can be
performed for the register CRC_DATA.
25.3
Register Address Mapping
Table 89 CRC Computing Unit Register Address Mapping
Register name
Description
Offset address
CRC_DATA
Data register
0x00
CRC_INDATA
Independent data register
0x04
CRC_CTRL
Control register
0x08
CRC_INITVAL
CRC initial value register
0x10
