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RTC can realize clock synchronization according to external high-precision clcok
and the register RTC_SHIFT. The deviation between RTC clock and external
clock is detected mainly by acquiring the timestamps of subsecond time period
twice. Since the synchronous prescaled value is used as the reload value of the
subsecond counter, and the SFSEC bit of register RTC_SHIFT is used in the
subsecond counter, the SFSEC bit can be adjusted to finely tune the RTC clock
and increase or decrease several cycles artificially.
Reference clock
RTC has internal reference clock detection, which can be used to compensate
the deviation of external LSECLK crystal oscillator. Set RCLKDEN bit to enable
the reference clock detection, compare the external 50Hz or 60Hz reference
clock with the internal 1Hz clock of RTC through RTC_REFIN pin, and through
this mechanism, the 1Hz clock after LSECLK frequency division is automatically
compensated.
After the reference clock detection is enabled, the synchronous and
asynchronous prescaler of the clock unit must be configured as the default
value.
The reference clock detection cannot be used simultaneously with the clock
synchronization, and it should be disabled in standby mode.
RTC digital calibration
RTC uses 2
20
RTC_CLK as a calibration cycle by default. In addition, 2
19
and 2
18
RTC_CLK can be set as a calibration cycle through the registers CALW16 and
CALW8. When LSECLK is used as RTC_CLK clock source, the calibration cycle
of RTC is 32s, 16s, 8s.
16s calibration cycle; the hardware sets RECALF[0] to '0'
8s calibration cycle; the hardware sets RECALF[1:0] to '00'
Take 32s calibration cycle as an example, the calibration mechanism is to add or
reduce some RTC_CLK signals in the calibration cycle.
When RECALF is used, RECALF RTC_CLK are reduced every 2
20
RTC_CLK
When ICALFEN is used and ICALFEN=1, one RTC_CLK is added
every 2
11
RTC_CLK
When RECALF is used and ICALFEN, (512 * ICALFEN - RECALF)
RTC_CLK are added every 2
20
RTC_CLK
RTC Write Protection
In order to prevent counting exception caused by accidental write, RTC register
adopts write protection mechanism. Only when the write protection is removed,
can the register with write protection function be operated.
After power-on, RTC register will enter the write protection state and the
protection cannot be removed by system reset. The write protection can be
removed by writing special keywords '0xCA' and '0x53' to the register
RTC_WRPROT. If the wrong keyword is written, RTC will immediately enable
write protection.
Calendar Register
RTC has subsecond, time and date shadow registers encoded by BCD, which
are RTC_SUBSEC, RTC_TIME and RTC_DATE respectively. The current
calendar can be obtained by accessing the shadow register or obtained directly
