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CTS flow control
CTSEN bit of USART_CTRL3 register determines whether CTS flow control is
enabled. If CTS flow control is enabled, the transmitter will detect whether the
data frame of nCTS pin can be transmitted. If TXBEFLG bit=0 for USART_STS
register and nCTS is pulled to low level, the data frame can be transmitted. If
nCTS becomes high during transmission, the transmitter will stop transmitting
after the current data frame is transmitted.
RTS flow control
RTSEN bit of USART_CTRL3 register determines whether RTS flow control is
enabled. If RTS flow control is enabled, when the receiver receives data, nRTS
will be pulled to low level. When a data frame is received, nRTS will becomes
high to inform the transmitter to stop transmitting data frame.
RS485 driver enable
DEN bit of USART_CTRL3 register determines whether to turn on the driver
enable function, and this function can allow DE signal to turn on the control
terminal of the external transceiver.
Lead time: The time interval between the driver enable signal and the start bit of
the first byte. Controlled by DLTEN[4:0] of USART_CTRL1 controller.
Lag time: The time interval between the stop bit of the last byte and the release
DE signal. Controlled by DDLTEN[4:0] of USART_CTRL1 register.
DMA Multi-processor Communication
USART can access the data buffer in DMA mode in order to reduce the burden of
processors.
Transmission in DMA mode
DMATXEN bit of USART_CTRL3 register determines whether to transmit in DMA
mode. When transmitting by DMA, the data in the designated SRAM will be
transmitted to the buffer by DMA.
Configuration steps of transmission by DMA:
（
1
）
Clear the TXCFLG flag bit of USART_STS register
（
2
）
Set the address of SRAM memory storing data as DMA source address
（
3
）
Set the address of USART_TXDATA register as DMA destination
address
（
4
）
Set the number of data bytes to be transmitted
（
5
）
Set channel priority
（
6
）
Set interrupt enable
（
7
）
Enable DMA channel
（
8
）
Wait for TXCFLG position 1 of USART_STS register, indicating
transmission completion
