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products, the basic unit of write protection is 4 pages (i.e. KB).
Read protection
The read protection has three levels, namely, Level 0, Level 1 and Level 2, which
are specifically described as follows:
Table 10 Difference among Read Protection Levels
Category
READPROT
Description
Level 0
0xAA
The main memory area and option byte are erasable, writable and
readable.
Level 1
Other values
except 0xAA and
0xCC
User mode: Allowed to erase, write and read the main memory area
and option byte.
Debug, SRAM running, system memory area running: Access to the
main memory area is disabled; the option byte is erasable, writable and
readable, but when the level is modified to 0, the main memory area
erase will be performed first.
Level 2
0xCC
Debug is not allowed, the main memory area and option byte cannot
be erased, written and read, and the level cannot be modified.
Write protection
Write protection control can be conducted for the corresponding page of the
main memory block by configuring the value of write protection option byte
WRP0/1/2/3. After the write protection is turned on, the content on the
corresponding page of the main memory area cannot be modified in any way.
3.4.2.4
Main memory block of unlock/lock
FMC_CTRL1 of the reset FMC will be locked by hardware, and then
FMC_CTRL1 can't be directly written, and the corresponding value must be
written to FMC_KEY according to the correct sequence to unlock FMC. The KEY
value is as follows:
KEY1=0x45670123
KEY2=0xCDEF89AB
The wrong writing sequence or wrong value will cause the program to enter the
hardware wrongly. At this time, FMC will be locked, and all FMC operations will
be invalid until it is reset next time. The users can also lock FMC through
software by writing "1" to LOCK bit of the control register 2 (FMC_CTRL2).
In each Flash programming operation, the users must follow the steps of "Flash
unlock - program by user - Flash lock", so as to avoid the risk that user code/data
is accidentally modified due to the Flash unlocking after the Flash programming
operation.
Option Byte
3.4.3.1
Erase option byte
Support erase function. After the correct option byte erase (or option byte write
operation) is completed, OCF of FMC_STS register will be set. If OCIE interrupt
is enabled, an operation completion interrupt will be triggered.
3.4.3.2
Write option byte
Eight configurable bytes of option bytes all support writing function.
3.4.3.3
Option byte of write protection
By default, the option byte is always readable and write protected. To perform
write operation (program/erase) for the option byte block, first write the correct
key sequence (the same as that of locking) in FMC_OBKEY, and then allow the
write operation of option byte block; the OBWEN bit of FLASH_CTRL2 register
indicates write enabled; clear this bit and write operation will be disabled.
