Geehy SEMICONDUCTOR APM32F030x4x6x8xC, User Manual

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5 Reset and Clock Management (RCM)
5.1
Full Name and Abbreviation Description of Terms
Table 17 Full Name and Abbreviation Description of Terms
Full name in English English abbreviation
Reset and Clock Management RCM
Reset RST
Power-On Reset POR
Power-Down Reset PDR
High Speed External Clock HSECLK
Low Speed External Clock LSECLK
High Speed Internal Clock HSICLK
Low Speed Internal Clock LSICLK
Phase Locked Loop PLL
Main clock output MCO
Calibrate CAL
Trim TRM
Clock Security System CSS
Non Maskable Interrupt NMI
5.2
Reset Functional Description
The supported reset is divided into three forms, namely, system reset, power
reset and RTC area reset.
System Reset
5.2.1.1
"System reset" reset source
The reset source can be divided into external reset source and internal reset
source.
External reset source:
 Low level on NRST pin
Internal reset source:
 Window watchdog termination count (WWDT reset)
 Independent watchdog termination count (IWDT reset)
 Software reset (SW reset)
 Low-power management reset