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If the check control is enabled, corresponding interrupt will be
triggered. Write 1 to PECLR bit of USART_INTFCLR register, and
PEFLG flag bit can be cleared.
Transmitter
When TXEN bit of the register USART_CTRL1 is set, the transmit shift register
will output data through TX pin and the corresponding clock pulses will be output
through CK pin.
21.4.3.1
Character transmit
During transmitting period of USART, the least significant bit of the data will be
moved out by TX pin first. In this mode, USART_TXDATA register has a buffer
between the internal bus and the transmit shift register.
A data frame is composed of the start bit, character and stop bit, so there is a
low-level start bit in front of each character; then there is a high-level stop bits the
number of which is configurable.
Transmission configuration steps
（
1
）
Decide the word length by setting DBLCFG bit of USART_CTRL1
register
（
2
）
Decide the number of stop bits by setting STOPCFG bit of
USART_CTRL2 register
（
3
）
If multi-buffer communication is selected, DMA should be enabled in
USART_CTRL3 register
（
4
）
Set the baud rate of communication in USART_BR register
（
5
）
Set UEN bit of USART_CTRL1 register to enable USART. Wait for
TXBEFLG bit of USART_STS register to be set to 1
（
6
）
Enable TXEN bit in USART_CTRL1 register, and transmit an idle frame
（
7
）
Write data to USART_TXDATA register (if DMA is not enabled, repeat
step 7 for each byte to be transmitted)
（
8
）
Wait for TXCFLG position 1 of USART_STS register, indicating
transmission completion
Note: TXEN bit cannot be reset during data transmission; otherwise, the data on TX pin will be destroyed,
which is because if the baud rate generator stops counting, the data being transmitted will be lost.
21.4.3.2
Single-byte communication
TXBEFLG bit can be cleared by writing USART_TXDATA register. When the
TXBEFLG bit is set by hardware, the shift register will receive the data
transferred from the transmit data register, then the data will be transmitted, and
the transmit data register will be cleared. The next data can be written in the data
register without covering the previous data.
（
1
）
If TXBEIEN in USART_CTRL1 register is set to 1, an interrupt will be
generated.
（
2
）
If USART is in the state of transmitting data, write to the data register to
save the data to the TXDATA register, and transfer the data to the shift
register at the end of the current data transmission.
