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Field
Name
R/W
Description
output after the dead time
11
RMOS
R/W
Run Mode Off-state Configure
Run mode means MOEN=1; disable means CcxEN=0; this bit describes
the impact of different values for this bit on the output waveform when
MOEN=1 and CcxEN changes from 0 to 1.
0: OCx/OCxN output is disabled
1: OCx/OCxN first outptus invalid level (the specific level value is affected
by the polarity configuration)
12
BRKEN
R/W
Break Function Enable
0: Disable
1: Enable
Note: When the protection level is 1, this bit cannot be modified.
13
BRKPOL
R/W
Break Polarity Configure
0: The break input BRK is valid at low level
1: The break input BRK is valid at high level
Note: When the protection level is 1, this bit cannot be modified. Writing to
this bit requires an APB clock delay before it can be used.
14
AOEN
R/W
Automatic Output Enable
0: MOEN can only be set to 1 by software
1: MOEN can be set to 1 by software or be automatically set to 1 in next
update event (breaking input is ineffective)
Note: When the protection level is 1, this bit cannot be modified.
15
MOEN
R/W
PWM Main Output Enable
0: Disable the output of OCx and OCxN or force the output of idle state
1: When CCxEN and CCxNEN bits of the TMRx_CCEN register are set,
turn on OCx and OCxN output
When the break input is valid, it is cleared by hardware asynchronously.
Note: Setting to 1 by software or setting to 1 automatically depends on
AOEN bit of the TMRx_BDT register.
DMA control software (TMRx_DCTRL)
Offset address: 0x48
Reset value: 0x0000
Field
Name
R/W
Description
4:0
DBADDR R/W
DMA Base Address Setup
These bits define the base address of DMA in continuous mode (when
reading or writing TMRx_DMADDR register), and DBADDR is defined as
the offset from the address of TMRx_CTRL1 register:
00000
：
TMRx_CTRL1
00001
：
TMRx_CTRL2
00010
：
TMRx_SMCTRL
…….
7:5
Reserved
12:8
DBLEN
R/W
DMA Burst Transfer Length Setup
These bits define the transfer length and transfer times of DMA in
continuous mode. The data transferred can be 16 bits and 8 bits.
When reading/writing TMRx_DMADDR register, the timer will conduct a
continuous transmission;
00000: Transmission for 1 time
00001: Transmission for 2 times
00010: Transmission for 3 times
……
10001: Transmission for 18 times
The transmission address formula is as follows:
Transmission address=TMRx_CTRL1 address (slave address)
+DMA index; DMA index=DBLEN
For example: DBLEN=7, DBADDR=TMR1_CTRL1 (slave address)
means the address of the data to be transmitted, while the address
