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1BFIGURES
INDEX
Figure 2-76 Clock control type algorithm .......................................................................... 2-115
Figure 2-77 Clock control type logic diagram ................................................................... 2-116
Figure 2-78 Test Mode Activation .................................................................................... 2-118
Figure 2-79 LEDs Test ..................................................................................................... 2-119
Figure 2-80 Output Test ................................................................................................... 2-119
Figure 2-81 Inputs Test .................................................................................................... 2-120
Figure 2-82 Display Test .................................................................................................. 2-120
Figure 2-83 Keyboard Test .............................................................................................. 2-121
Figure 3-1 Starting window .................................................................................................. 3-2
Figure 3-2 Selection of the relay .......................................................................................... 3-3
Figure 3-3 Relay configuration ............................................................................................. 3-3
Figure 3-4 Record initialization ............................................................................................. 3-4
Figure 3-5 Date and time change ......................................................................................... 3-5
Figure 3-6 Access password change ................................................................................... 3-5
Figure 3-7 Firmware update ................................................................................................. 3-6
Figure 3-8 Test Mode ........................................................................................................... 3-7
Figure 3-9 Relay configuration ............................................................................................. 3-8
Figure 3-10 System Setup/Global Setting .......................................................................... 3-10
Figure 3-11 System Setup/Others ...................................................................................... 3-11
Figure 3-12 System Setup/Hardware Configuration ........................................................... 3-12
Figure 3-13 Configuration of IRIG-B Synchronization ........................................................ 3-13
Figure 3-14 Daylight Saving Time ...................................................................................... 3-14
Figure 3-15 Sequence of events ........................................................................................ 3-15
Figure 3-16 Waveform Record Configuration ..................................................................... 3-16
Figure 3-17 Rolling Display ................................................................................................ 3-17
Figure 3-18 Metering Settings ............................................................................................ 3-19
Figure 3-19 Demand Settings ............................................................................................ 3-20
Figure 3-20 Power Quality Configuration ........................................................................... 3-22
Figure 3-21 Line Parameters Configuration ....................................................................... 3-23
Figure 3-22 Fault Location ................................................................................................. 3-23
Figure 3-23 Reliability Indexes Settings ............................................................................. 3-24
Figure 3-24 Station Battery Monitor ................................................................................... 3-25
Figure 3-25 Low instantaneous over current (50) ............................................................... 3-27
Figure 3-26 Individual phase settings ................................................................................. 3-28
Figure 3-27 Time over current (51) .................................................................................... 3-29
Figure 3-28 Time characteristic graphic ............................................................................. 3-30
Figure 3-29 Example of protection coordination ................................................................. 3-31
Figure 3-30 Time Current Curve modifiers ......................................................................... 3-31
Figure 3-31 Negative sequence over current (50Q/51Q) ................................................... 3-33
Figure 3-32 Directional (67/67N/67NS) .............................................................................. 3-35
Figure 3-33 Open Phase (46FA) ........................................................................................ 3-36
Figure 3-34 Undervoltage (27) ........................................................................................... 3-37
Figure 3-35 Overvoltage (59) ............................................................................................. 3-38
Figure 3-36 Neutral Overvoltage (59N) .............................................................................. 3-40
Figure 3-37 Unbalance of voltages (47) ............................................................................. 3-41
Figure 3-38 Minimum, Maximum and Derivate Frequency ................................................. 3-42
Figure 3-39 Directional power (32) ..................................................................................... 3-44
Figure 3-40 Example of a logic lock ................................................................................... 3-46
Figure 3-41 Synchrocheck (25) .......................................................................................... 3-47
Figure 3-42 Recloser relay (79) .......................................................................................... 3-49
Summary of Contents for smART P500
Page 1: ...Instruction Manual Multifunction Protection Relay smART P500...
Page 23: ...2BTABLES INDEX THIS PAGE HAS BEEN LEFT BLANK INTENTIONALLY...
Page 39: ...5BHARDWARE FEATURES INTRODUCTION Figure 1 9 Wye Wye Connection measured neutral...
Page 40: ...5BHARDWARE FEATURES INTRODUCTION Figure 1 10 Wye Wye Connection sensitive neutral...
Page 41: ...5BHARDWARE FEATURES INTRODUCTION Figure 1 11 Open Delta Connection measured neutral...
Page 42: ...5BHARDWARE FEATURES INTRODUCTION Figure 1 12 Open Delta Connection sensitive neutral...
Page 511: ...2BANSI CURVES 0BCURVES FOR TIME CHARACTERISTICS Figure I 6 Moderately ANSI curve...
Page 513: ...2BANSI CURVES 0BCURVES FOR TIME CHARACTERISTICS Figure I 7 Very inverse ANSI curve...
Page 515: ...2BANSI CURVES 0BCURVES FOR TIME CHARACTERISTICS Figure I 8 Extremely inverse ANSI curve...
Page 532: ...4BRECLOSER CURVES 0BCURVES FOR TIME CHARACTERISTICS Figure I 14 Recloser Curves 101 119...
Page 535: ...4BRECLOSER CURVES 0BCURVES FOR TIME CHARACTERISTICS Figure I 15 Recloser Curves 120 142...
Page 538: ...4BRECLOSER CURVES 0BCURVES FOR TIME CHARACTERISTICS Figure I 16 Recloser Curves 151 202...