Register Descriptions
1323
SPRUH22I – April 2012 – Revised November 2019
Copyright © 2012–2019, Texas Instruments Incorporated
M3 Universal Serial Bus (USB) Controller
18.5.16 USB Transmit FIFO Start Address Register (USBTXFIFOADD), offset 0x064
The USB transmit FIFO start address 16-bit register (USBTXFIFOADD) controls the start address of the
selected transmit endpoint FIFOs.
Mode(s):
OTG A or Host
OTG B or Device
USBTXFIFOADDR is shown in
and described in
Figure 18-21. USB Transmit FIFO Start Address Register (USBTXFIFOADDR])
15
9
8
0
Reserved
ADDR
R-0
R/W-0
LEGEND: R/W = Read/Write; R = Read only; -
n
= value after reset
Table 18-24. USB Transmit FIFO Start Address Register (USBTXFIFOADDR) Field Descriptions
Bit
Field
Value
Description
15-9
Reserved
0
Reserved
8-0
ADDR
Start Address of the endpoint FIFO in units of 8 bytes.
0h
0
1h
8
2h
16
3h
24
4h
32
5h
40
6h
48
7h
56
8h
64
..
..
1FFh
4095