128 N9030B PXA Signal Analyzer Service Guide
Instrument Messages
Condition Messages
Condition Errors 101 to 199, Measurement Integrity
This series of errors corresponds to the bits in the
STATus:QUEStionable:INTegrity register. The second column in the table shows
the corresponding bit.
An event with the error number shown in the table means the condition has
been detected. When the condition is cleared, an event with the error number
plus 1000 is generated. These error numbers can be seen in the Show Errors
screen, along with the DETECTED and CLEARED indicators.
For example, error 141 indicates an Input Overload condition has been
detected, error 1129 indicates that failure has been cleared.
Two bits in this register are “summary bits” for registers at a lower level. There
are no error messages associated with these bits; they exist only as status bits,
read with a STATus:QUEStionable:INTegrity? event query or a
STATus:QUEStionable:INTegrity:CONDition? query.
Note that these summary bits summarize the state and history of the event
registers at the lower level. This is true even for bits in the
STATus:QUEStionable:INTegrity condition register. This means that:
The summary bits read by the STATus:QUEStionable:INTegrity:CONDition?
query are true if any event bits are set in any of the :INTegrity sub-registers
:SIGNal or :UNCalibrated.
The summary bits read by the STATus:QUEStionable:INTegrity? event query are
true if any event bit has undergone a false-to-true transition with the
PTRansition filter set, or a true-to-false transition with the NTRansition filter
set, in any of the :INTegrity sub-registers :SIGNal or :UNCalibrated
Thus, the summary bits cannot be used to determine the current state of a
lower level condition bit; only the state and history of the lower level event bits.
This register is itself summarized as bit 9 of the STATus:QUEStionable register.
See section
“Condition Errors 601 to 699, Error Summaries” on page 143
Err#
Bit in
status
register
Message
Error or
Warning
More Information
133
0
Signal Summary
status bit
only
This bit is the summary bit for the
STATus:QUEStionable:INTegrity:SIGNal
sub-register.
135
1
No Result
E
135
1
No Result;Turn on MCE
E
To calculate Timing and Phase results in
the Code Domain Power view of Mod
Accuracy, the “Multi Channel Estimator”
must be set to ON. Otherwise these
results are invalid.
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