Table 18. Processor Configuration Table (continued)
Model
Processor
Feature Code
Processor
Capacity Card
CCIN
Interactive Card
CCIN
Proc 0
CCIN
Proc 1
CCIN
Proc 2
CCIN
Proc 3
CCIN
840
23FF
2420
1547
245E
245E
245E
840
24C0
2416
1540
245F
245E
840
24C1
2416
1541
245F
245E
840
24C2
2416
1542
245F
245E
840
24C3
2416
1543
245F
245E
840
24C4
2416
1544
245F
245E
840
24C5
2416
1545
245F
245E
840
24C6
2416
1546
245F
245E
840
24C8
2417
1540
245F
245E
245E
840
24C9
2417
1541
245F
245E
245E
840
24CA
2417
1542
245F
245E
245E
840
24CB
2417
1543
245F
245E
245E
840
24CC
2417
1544
245F
245E
245E
840
24CD
2417
1545
245F
245E
245E
840
24CE
2417
1546
245F
245E
245E
840
24D0
2419
1540
245F
245E
245E
245E
840
24D1
2419
1541
245F
245E
245E
245E
840
24D2
2419
1542
245F
245E
245E
245E
840
24D3
2419
1543
245F
245E
245E
245E
840
24D4
2419
1544
245F
245E
245E
245E
840
24D5
2419
1545
245F
245E
245E
245E
840
24D6
2419
1546
245F
245E
245E
245E
840
24D7
2419
1547
245F
245E
245E
245E
Table 19. Processor Configuration Table
Model
Processor
Feature Code
Processor
Capacity Card
CCIN
Interactive Card
CCIN
Proc 0
CCIN
Proc 1
CCIN
Proc 2
CCIN
Proc 3
CCIN
SB2
2315
2315
na
245D
245D
830
23C1
2400
1531
245C
830
23C2
2400
1532
245C
830
23C3
2400
1533
245C
830
23C4
2400
1534
245C
830
23C5
2400
1535
245C
830
23D1
2402
1531
234D
830
23D2
2402
1532
234D
830
23D3
2402
1533
234D
830
23D4
2402
1534
234D
830
23D5
2402
1535
234D
Symbolic FRUs
Chapter 3. Problem Isolation Procedures (PIPs), Failing Items, and Symbolic FRU Isolation
517
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