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Theory of Operation— 2440 Service
S y s te m P ro c e s s o r (d ia g ra m 1)
The System #/P. under program direction, controls all
the functions of the scope and coordinates the functions of
the two other microprocessors (the Front-Panel
^ P
and the
Waveform
nP).
The System
n P
has a 16-bit address bus
and a separate 8-bit data bus. No multiplexing of the data
bus is required. Addresses are decoded to access the
memory-mapped devices on the data bus, and control sig
nals generated by the System
^ P
control communication
between the
n P
and the bus devices. An extensive inter
rupt circuit enables devices on the bus to request servicing
when necessary to get new instructions or take other
action. A power-up reset circuit permits an orderly power-
on and power-off sequence of the System
nP.
Permanent programming used to control the Operating
System resides in the System ROM. The System ROM
contains one 16K byte X 8-bit memory device and four
64K byte x 8-bit memory devices for a total of 272 K
bytes of memory. A page-switching scheme is used to per
mit the System
m
P to access all the available memory
addresses of ROM.
System RAM consists of a single 32K byte X 8-bit
memory device. Data needing short-term storage (data
used for performing various control functions) as well as
data needing long-term storage (calibration constants, the
front-panel setup at power down, etc.) are stored in this
nonvolatile RAM. A battery-backup system maintains the
data in this memory during power off.
N O T E
A lth o u g h a ll th e d a ta in this m e m o ry d e v ic e is
b a c k e d up a n d is, th erefore, non vo latile, th a t p a r t o f
th e S y s te m R A M re s e rv e d fo r d a ta th a t N E E D S to
b e b a c k e d u p is re fe rre d to a s N V R A M th ro u g h o u t
this section. P a rts o f S y s te m R A M th a t d o N O T
N E E D b a c k in g u p a r e re fe rre d to a s volatile R A M o r
ju s t R A M .
F ro n t P a n e l P ro c e s s o r (d ia g ra m 3 )
The Front Panel
n P
is a special-purpose device used to
respond to switch and control changes. When a control
changes, the Front Panel
n P
informs the System
n P
so
that the operating state may be altered to match the
requested change. Potentiometer controls are digitized to
provide the necessary change data to the System
n P.
The
System
^ P
notes the control that changed, the amount
and direction of change (if a pot), and sends out the
necessary commands to make the change. New settings
are updated in the nonvolatile RAM so that they will be
available in the event of a power-off. On a power-on, the
Front-Panel
n P
receives instructions as to how the
switches are to be interpreted and then begins scanning
the front panel, watching for a control to change. The Sys
tem
fiP
is then free to carry on with other functions.
F ro n t P a n e l (d ia g ra m 4 ) a n d A u x ilia ry F ro n t P a n e l
(d ia g ra m 6 )
All the buttons and knobs of the Front Panel and Auxili
ary Front Panel are “soft” controls and do not directly
activate a circuit function. This fact allows the switch func
tions and menu labels to be changed (especially the bezel
buttons of the Auxiliary Front Panel which are used to
make menu selections) as necessary. Buttons may be
defined by the System
fiP
to be push-push on-off, momen
tary contact, continuous, or toggle switches. Control
changes are monitored by the Front Panel ^P- Potentiome
ter controls are digitized; and when a change occurs, the
amount and direction of change is sent to the System ^P
to make the appropriate operational changes. Push but
tons that are pressed are interpreted as to what type of
switch action occurred (from the switch-type definition list)
and that information is sent to the System
fiP
to make the
appropriate operational changes.
All the buttons and knobs located to the right of the crt
(facing the scope) are monitored via circuitry of the Front
Panel. The Auxiliary Front Panel contains the circuitry
required to monitor the bezel buttons (menu selection but
tons), the push buttons, and the INTENSITY knob (all
located directly beneath the crt). Probe coding for the
vertical-channel and external-trigger BNC connectors and
the 50
$2
overload circuits for CH 1 and CH 2 are also
monitored via the Auxiliary Front Panel circuitry.
S y s te m D A C (d ia g ra m s 5 a n d 6 )
The System DAC is used in normal operation to set the
various analog control voltages throughout the instrument.
Such things as preamplifier gain, vertical position and
centering, trigger levels, holdoff time, common-mode
adjust, scale illumination, intensity of the various CRT
displays, and CCD positions offsets are all controlled by
the System ^P via the System DAC. Digital values
representing the analog voltage levels required for the
various controls are written to the digital-to-analog con
verter (DAC) input registers where they are converted to
analog voltage levels at the inputs to the Sample-and-Flold
circuits. The Sample-and-Hold circuits maintain a fixed out
put voltage to the controlled circuit between updates by
the System ^P.
For calibration and diagnostic purposes, the System
DAC is used to send known voltage levels to various
circuits. Those levels may then be adjusted to remove
offsets and set gain levels to achieve analog calibration or
to test the gains and offsets for diagnostic purposes.
A c q u is itio n C o n tro l R e g is te rs (d ia g ra m 5 )
The Acquisition Control Registers are the digital control
interface between the System
n P
and the switchable
acquisition circuitry. Switching data is written to the
3 -5
Summary of Contents for 2440
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Page 91: ...Theory of Operation 2440 Service 3 49 Figure 3 5 Simplified CCD architecture ...
Page 120: ...Theory of Operation 2440 Service Figure 3 10 DC Restorer 3 78 ...
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Page 136: ...Theory of Operation 2440 Service Figure 3 15 PWM Regulator and Inverter 3 94 ...
Page 138: ...Theory of Operation 2440 Service Figure 3 16 PWM switching waveforms 3 96 ...
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Page 423: ...2440 Service Figure 9 4b 2440 Block diagram part 2 6330 27 BLOCK DIAGRAM PART 2 ...
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