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Maintenance— 2440 Service
Table 6-6 (cont)
3000
All RAM tests are non-destructive. The Display RAM is tested first, and, if found good, the contents of
SYS-R A M
the other RAMs are stored in the Display RAM as they are tested. The contents are returned after the
test is complete.
From this level (3000), all eight RAM tests are selected in turn. An individual RAM test may be run by
selecting test levels 3100 to 3800.
NOTE
An internal jumper, A13J156, must be removed before test levels 3700 and 3800 may be
run. If the jumper is removed and test levels 3700 and 3800 are run, loss of power during
while they are running can result in loss of internal calibration constants. In that event, a
partial recalibration is required (see information regarding power loss while running SELF
CAL under “Diagnostics’ in this section). Run these tests only if necessary.
3100 A11U431
3200 A 11U440
3300 A 12U350
3400 A11U430
3500 A llU 6 0 0
3600 A 12U440
3700 A 12U664
3800 A 12U664
Each RAM test (levels 3100-3800) is comprised of the four following subparts:
A logic one is shifted left through a field of logic zeros while incrementing the address
(the
TRIGGER SLOPE LED is lit).
A logic one is shifted right through a field of logic zeros while decrementing the address
(the “ + ” TRIGGER SLOPE LED is lit).
A logic zero is shifted left through a field of logic ones while incrementing address (the
TRIGG ER SLOPE LED is lit).
A logic zero is shifted right through a field of zeroes while decrementing the address
(the “+ " TRIG G ER SLOPE LED is lit).
Running level 3000 causes all four parts of the test to be performed on all 8 RAM s (sublevels
3100-3800), while running an individual sublevel test causes the four-part test to be performed on
the corresponding RAM device.
Running a sublevel test from 3 x 1 0 to 3 x 4 0 (where x = 1-8) runs the part (out of four parts)
indicated by the test label (for instance, ‘ 3340 1 -0 S ’ runs the test th at shifts logic 0 left in a field
of logic ones for an incrementing address on U350).
3100
RAM A11U431 (schematic diagram 16):
A11U431
--------------------------------------------------------------------------------------------------------------------------------------------------------------
Troubleshooting Procedure:
If test — FAIL then look for failure and correct using the following steps:
Using the CH 1 probe:
1.
Run test 3110 in CO N TINU O U S mode and check for activity on the chip select line to U431 (C SY,
pin 18). If active, trigger the test scope on the signal. If no chip select, work backwards and find
problem.
Using the CH 2 probe:
2.
Check for activity on the w rite enable line to U431 (W E, pin 21) and note that it is LO at the same
tim e as the chip select line. If no signal present, work backwards and find the problem.
3.
Check for activity on the output enable line to U431 (DEY, pin 20). If none, work backwards and
find the problem.
4 .
Check the data I/O pins of U431 (pins 9 , 1 0 , 1 1 , 1 3 , 1 4 , 1 5 , 1 6 , and 17) for activity when test 3100
is selected. If no activity when DEY (output enable) is LO (pin stuck HI or LO), then suspect U322;
otherwise suspect U 431.
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Summary of Contents for 2440
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