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Theory of Operation— 2440 Service
signal applied, the channel resistance of Q514 is minimum,
setting the gain of the AGC Amplifier to maximum. With
maximum gain and no signal, the feedback loops of the
Back-Porch Clamp and the Sync-Tip Clamp set the circuit
gain as if an average “ground” signal were being received.
The composite-video input signal is applied to one input
of the differential AGC Amplifier at pin 3 of U612 and to
Dc-Offset Amplifier U710B via a low-pass filter composed
of R714 and C714. The low-pass filter averages the signal
at the input of U710B so that only the average (dc) signal
level appears at the output of U710B and on pin 11 of
U612. Since the input signal swings about this average
level, the AGC Amplifier output signal will be centered in
its linear amplification region.
The base-emitter bias of the differential output transis
tors within U612 are controlled by the NEG-SYNC signal
from Video Option Control Register U750 (diagram 20).
When the NEG-SYNC bin is set HI, the transistors con
nected to pins 2 and 9 will be biased on, with those at pins
6 and 13 biased off. When NEG-SYNC is set LO, the con
ducting transistors are switched, and the polarity of the
output
signal
driving
transistor
Q612
is
inverted.
Common-base transistor Q612 level shifts the output sig
nal from the AGC Amplifier and provides voltage gain to
drive U610D.
FIXED GAIN AMPLIFIER. The Fixed Gain Amplifier cir
cuit, formed by U610A, B, and C, Q502, and U710C, pro
vides additional gain to the video signal from the AGC
Amplifier. The Trigger Back-Porch Clamp circuit monitors
the back-porch level of the resulting signal and injects an
offsetting dc level into the Fixed Gain Amplifier via U710C
to shift that level to approximately + 4 .5 V.
Emitter-follower U610D drives one input of a differential
amplifier made up of U610A and U610B, while the other
input is driven by the output signal of U710C. Transistor
U610C and its associated components form the current
source for the amplifier. The collector output of U610B
drives the input of the Sync Pickoff Comparator.
Transistor Q502 and its associated circuitry act as a
start-up circuit that monitors the dc output level of U610B
and applies an offset voltage to pin 10 of U710C should
that level go below zero volts. This occurs when going
from a “no-signal” or low-signal condition to a strong sig
nal. If the dc output level goes below ground, diode CR612
will become forward biased, shutting off Q502. With Q502
off, the - 1 5 V supply applied via resistor R506 will for
ward bias CR606 to charge C713 negatively. This pulls the
output voltage of U710C negative and decreases base
drive to U610B. Reducing base drive reduces the collector
current so that the collector voltage of U610B returns
positive until the above zero-volt output level is restored
and CR612 becomes biased off.
SYNC PICKOFF COMPARATOR. The Sync-Pickoff
Comparator, composed of Q504 and Q510, switches when
the amplitude of a sync pulse crosses the comparator
threshold level. The switching threshold is set by the bias
ing resistors of Q510, R408 and R409, to about 50% of
the sync level to eliminate any video information. The out
put signal from the collector of Q510 is the composite of
all detected sync pulses, and the output of Q504 is an
inverted replica of that signal.
SYNC-TIP CLAMP AND AUTOMATIC GAIN CON
TROL. Transconductance Amplifier U510, in conjunction
with the AGC Amplifier, is used to clamp the sync-tip level.
Amplifier U510 is enabled by the bias current supplied by
Q 512 when sync tips turn that transistor on. This amplifier
acts as a weak operational amplifier to set the sync-tip
level constant when Q512 is conducting to supply bias
current to pin 5 of U510.
The Sync-Tip Clamp holds the negative-sync tips at
about + 0 .5 V, so the resulting sync pulses are approxi
mately 4 V in amplitude. Anytime the negative-sync tips at
the collector of U610B go below about + 0 .5 V, input pin 3
of U510 will go below the ground reference at the other
input. This causes the output of U510 to go low when
enabled, and C512 begins discharging slowly toward
- 1 5 V. This decreasing voltage is applied to the gate of
FET Q514 to increase the channel resistance and
decrease the gain of the AGC Amplifier. Since U510 is a
transconductance amplifier, it can change the voltage
across C514 only a small amount during each sync pulse,
and a few horizontal-line cycles are needed to reduce the
gain of the AGC Amplifier to the new operating level.
Between sync tips, when amplifier U510 is disabled, the
long time constant of R610 and C512 holds the bias for
Q514 (and thus gain of the AGC Amplifier) nearly
constant.
Diode CR502 acts to reduce AGC Amplifier gain quickly
if the negative-sync-tip amplitude at the collector of U610B
drops below - 0 . 8 V. If the diode becomes forward biased,
as it might should the signal amplitude go suddenly nega
tive, Q510 will be turned on for a longer time until the sig
nal amplitude returns to a lower level. Amplifier U510 can
then increase the channel resistance of Q514 more quickly
to reduce gain of the AGC Amplifier and return the sync-
tip amplitude to the correct level.
TRIGGER BACK-PORCH CLAMP. The Trigger Back-
Porch Clamp circuit formed by U504, U410A, and associ
ated components, is enabled for a short time during each
horizontal-sync pulse immediately following the sync tip
(during the back-porch time). The output of the Trigger
Back-Porch Clamp is used to hold the back-porch level of
the composite-video signal to a predetermined dc level.
This, in combination with the action of the Sync-Tip
Clamp, produces sync pulses that are approximately 4 V
in amplitude.
3 -8 5
Summary of Contents for 2440
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