NXP Semiconductors MC9S08LG16, Reference Manual

Page: 14 / 373

MC9S08LG32 MCU Series, Rev. 5
14 Freescale Semiconductor
Section Number Title Page
10.2.1 Analog Power (V
DDA
) ....................................................................................................206
10.2.2 Analog Ground (V
SSA
) ...................................................................................................206
10.2.3 Voltage Reference High (V
REFH
) ...................................................................................206
10.2.4 Voltage Reference Low (V
REFL
) ....................................................................................206
10.2.5 Analog Channel Inputs (ADx) ........................................................................................206
10.3 Register Definition .........................................................................................................................206
10.3.1 Status and Control Register 1 (ADCSC1) ......................................................................206
10.3.2 Status and Control Register 2 (ADCSC2) ......................................................................208
10.3.3 Data Result High Register (ADCRH) .............................................................................208
10.3.4 Data Result Low Register (ADCRL) ..............................................................................209
10.3.5 Compare Value High Register (ADCCVH) ....................................................................209
10.3.6 Compare Value Low Register (ADCCVL) .....................................................................210
10.3.7 Configuration Register (ADCCFG) ................................................................................210
10.3.8 Pin Control 1 Register (APCTL1) ..................................................................................211
10.3.9 Pin Control 2 Register (APCTL2) ..................................................................................212
10.3.10Pin Control 3 Register (APCTL3) ..................................................................................213
10.4 Functional Description ...................................................................................................................214
10.4.1 Clock Select and Divide Control ....................................................................................215
10.4.2 Input Select and Pin Control ...........................................................................................215
10.4.3 Hardware Trigger ............................................................................................................215
10.4.4 Conversion Control .........................................................................................................215
10.4.5 Automatic Compare Function .........................................................................................218
10.4.6 MCU Wait Mode Operation ............................................................................................218
10.4.7 MCU Stop3 Mode Operation ..........................................................................................219
10.4.8 MCU Stop2 Mode Operation ..........................................................................................219
10.5 Initialization Information ...............................................................................................................220
10.5.1 ADC Module Initialization Example ..............................................................................220
10.6 Application Information.................................................................................................................222
10.6.1 External Pins and Routing ..............................................................................................222
10.6.2 Sources of Error ..............................................................................................................223
Chapter 11
Internal Clock Source (S08ICSV3)
11.1 Introduction ....................................................................................................................................226
11.1.1 Features ...........................................................................................................................228
11.1.2 Block Diagram ................................................................................................................228
11.1.3 Modes of Operation ........................................................................................................229
11.2 External Signal Description ...........................................................................................................230
11.3 Register Definition .........................................................................................................................230
11.3.1 ICS Control Register 1 (ICSC1) .....................................................................................231
11.3.2 ICS Control Register 2 (ICSC2) .....................................................................................233
11.3.3 ICS Trim Register (ICSTRM) .........................................................................................233