NXP Semiconductors MC9S08LG16, Reference Manual

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Chapter 3 Modes of Operation
MC9S08LG32 MCU Series, Rev. 5
42 Freescale Semiconductor
• When encountering a DBG breakpoint
NOTE
The MCU needs to be unsecure for the last four methods.
After entering active background mode, the CPU is held in a suspended state while it waits for serial
background commands instead of executing instructions from the user application program.
The background commands are of two types:
• Non-intrusive commands — These commands are defined as commands that can be issued while
the user program is running. Non-intrusive commands can be issued through the BKGD pin while
the MCU is in run mode. Non-intrusive commands can also be executed when the MCU is in active
background mode. Non-intrusive commands include:
— Memory access commands
— Memory-access-with-status commands
— BDC register access commands
— The BACKGROUND command
• Active background commands— These commands can only be executed while the MCU is in
active background mode. Active background commands include commands to:
— Read or write CPU registers
— Trace one user program instruction at a time
— Leave active background mode to return to the user application program (GO)
Active background mode is used to program a bootloader or user application program into the flash
program memory before the MCU is operated in run mode for the first time. When the MC9S08LG32
series is shipped from the Freescale Semiconductor factory, the flash program memory is erased by default,
unless specifically noted. As a result, no program can be executed in run mode until the flash memory is
initially programmed. Active background mode can also be used to erase and reprogram the flash memory
after it has been previously programmed.
For additional information about the active background mode, refer to the Chapter 18, “Development
Support .”
3.5 Wait Mode
Wait mode is entered by executing a WAIT instruction. Upon execution of the WAIT instruction, the CPU
enters a low-power state in which it is not clocked. The I bit in CCR is cleared when the CPU enters wait
mode, enabling interrupts. When an interrupt request occurs, the CPU exits the wait mode and resumes
processing beginning with the stacking operations that lead to the interrupt service routine.
While the MCU is in wait mode, there are some restrictions on which background debug commands can
be used. Only the BACKGROUND command and memory-access-with-status commands are available
when the MCU is in wait mode. The memory-access-with-status commands do not allow memory access,
but they report an error indicating that the MCU is either in stop or wait mode. The BACKGROUND
command can be used to wake the MCU from the wait mode and enter active background mode.