NXP Semiconductors MC9S08LG16, Reference Manual

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Chapter 19 Debug Module (DBG) (64K)
MC9S08LG32 MCU Series, Rev. 5
Freescale Semiconductor 359
19.3.2.10 Debug Comparator B Extension Register (DBGCBX)
Table 19-11. DBGCAX Field Descriptions
Field Description
7
RWAEN
Read/Write Comparator A Enable Bit — The RWAEN bit controls whether read or write comparison is enabled
for Comparator A.
0 Read/Write is not used in comparison
1 Read/Write is used in comparison
6
RWA
Read/Write Comparator A Value Bit — The RWA bit controls whether read or write is used in compare for
Comparator A. The RWA bit is not used if RWAEN = 0.
0 Write cycle will be matched
1 Read cycle will be matched
Module Base + 0x0009
7 6 5 4 3 2 1 0
R
RWBEN RWB
0 0 0 0 0 0
W
POR
or non-
end-run
0 0 0 0 0 0 0 0
Reset
end-run
1
1
In the case of an end-trace to reset where DBGEN=1 and BEGIN=0, the bits in this register do not change after reset.
U U U 0 0 0 0 U
= Unimplemented or Reserved
Figure 19-11. Debug Comparator B Extension Register (DBGCBX)
Table 19-12. DBGCBX Field Descriptions
Field Description
7
RWBEN
Read/Write Comparator B Enable Bit — The RWBEN bit controls whether read or write comparison is enabled
for Comparator B. In full modes, RWAEN and RWA are used to control comparison of R/W and RWBEN is
ignored.
0 Read/Write is not used in comparison
1 Read/Write is used in comparison
6
RWB
Read/Write Comparator B Value Bit — The RWB bit controls whether read or write is used in compare for
Comparator B. The RWB bit is not used if RWBEN = 0. In full modes, RWAEN and RWA are used to control
comparison of R/W and RWB is ignored.
0 Write cycle will be matched
1 Read cycle will be matched