NXP Semiconductors MC9S08LG16, Reference Manual

Page: 180 / 373

Chapter 8 LCD Module (S08LCDLPV1)
MC9S08LG32 MCU Series, Rev. 5
180 Freescale Semiconductor
9.4.1.4.2 1/4 Duty Multiplexed with 1/3 Bias Mode (Low-power Waveform)
Duty = 1/4: DUTY[2:0] = 011
LCD pins 0 – 3 enabled as backplanes: LCDBPEN0 = 0x0F
LCD[0] assigned to Phase A: LCDWF0 = 0x01
LCD[1] assigned to Phase B: LCDWF1 = 0x02
LCD[2] assigned to Phase C: LCDWF2 = 0x04
LCD[3] assigned to Phase D: LCDWF3 = 0x08
Figure 9-14. 1/4 Duty and 1/3 Bias (Low-Power Waveform)
LCD[0]/BP0
BP0–FPn (ON)
1 Frame
LCD[1]/BP1
LCD[2]/BP2
BP1–FPn (OFF)
LCDWFn(0x09)
LCD[3]/BP3
Base_Clk
=00001001
B D A C
Phase
B D A C
B D A C
Phase
B D A C
Frame Interrupt
V
LL1
V
LL3
0
V
LL2
V
LL1
V
LL3
0
V
LL2
V
LL1
V
LL3
0
V
LL2
V
LL1
V
LL3
0
V
LL2
-V
LL3
-V
LL1
-V
LL2
V
LL1
V
LL3
0
V
LL2
-V
LL3
-V
LL1
-V
LL2
V
LL1
V
LL3
0
V
LL2
V
LL1
V
LL3
0
V
LL2