NXP Semiconductors MC9S08LG16, Reference Manual

Page: 147 / 373

Chapter 8 Central Processor Unit (S08CPUV5)
MC9S08LG32 MCU Series, Rev. 5
Freescale Semiconductor 147
ASL opr8a
ASLA
ASLX
ASL
oprx8 ,X
ASL ,X
ASL
oprx8 ,SP
Arithmetic Shift Left
(Same as LSL)
DIR
INH
INH
IX1
IX
SP1
38
48
58
68
78
9E 68
dd
ff
ff
5
1
1
5
4
6
rfwpp
p
p
rfwpp
rfwp
prfwpp
Þ
1 1 – –
Þ Þ Þ
ASR opr8a
ASRA
ASRX
ASR
oprx8 ,X
ASR ,X
ASR
oprx8 ,SP
Arithmetic Shift Right
DIR
INH
INH
IX1
IX
SP1
37
47
57
67
77
9E 67
dd
ff
ff
5
1
1
5
4
6
rfwpp
p
p
rfwpp
rfwp
prfwpp
Þ
1 1 – –
Þ Þ Þ
BCC rel
Branch if Carry Bit Clear
(if C = 0)
REL
24 rr
3
ppp
– 1 1 – – – – –
BCLR n , opr8a
Clear Bit n in Memory
(Mn
←
0)
DIR (b0)
DIR (b1)
DIR (b2)
DIR (b3)
DIR (b4)
DIR (b5)
DIR (b6)
DIR (b7)
11
13
15
17
19
1B
1D
1F
dd
dd
dd
dd
dd
dd
dd
dd
5
5
5
5
5
5
5
5
rfwpp
rfwpp
rfwpp
rfwpp
rfwpp
rfwpp
rfwpp
rfwpp
– 1 1 – – – – –
BCS rel
Branch if Carry Bit Set (if C = 1)
(Same as BLO)
REL
25 rr
3
ppp
– 1 1 – – – – –
BEQ rel Branch if Equal (if Z = 1) REL
27 rr
3
ppp
– 1 1 – – – – –
BGE rel
Branch if Greater Than or Equal To
(if N
⊕
V = 0) (Signed)
REL
90 rr
3
ppp
– 1 1 – – – – –
BGND
Enter active background if ENBDM=1
Waits for and processes BDM
commands until GO, TRACE1, or
TAGGO
INH
82
5+
fp...ppp
– 1 1 – – – – –
BGT rel
Branch if Greater Than (if Z | (N
⊕
V) = 0)
(Signed)
REL
92 rr
3
ppp
– 1 1 – – – – –
BHCC rel Branch if Half Carry Bit Clear (if H = 0) REL
28 rr
3
ppp
– 1 1 – – – – –
BHCS rel Branch if Half Carry Bit Set (if H = 1) REL
29 rr
3
ppp
– 1 1 – – – – –
BHI rel Branch if Higher (if C | Z = 0) REL
22 rr
3
ppp
– 1 1 – – – – –
BHS rel
Branch if Higher or Same (if C = 0)
(Same as BCC)
REL
24 rr
3
ppp
– 1 1 – – – – –
BIH rel Branch if IRQ Pin High (if IRQ pin = 1) REL
2F rr
3
ppp
– 1 1 – – – – –
BIL rel Branch if IRQ Pin Low (if IRQ pin = 0) REL
2E rr
3
ppp
– 1 1 – – – – –
Table 8-2. Instruction Set Summary (Sheet 2 of 10)
Source
Form
Operation
Ad
dr
ess
Mode
Object Code
Cyc
les Cyc-by-Cyc
Details
Affect
on CCR
V 1 1 H I N Z C
C
b0
b7
0
b0 b7
C