NXP Semiconductors MC9S08LG16, Reference Manual

Page: 192 / 373

Chapter 8 LCD Module (S08LCDLPV1)
MC9S08LG32 MCU Series, Rev. 5
192 Freescale Semiconductor
9.5.2.2
Initialization
Example 2
Example 2 LCD setup requirements are reiterated in the table below:
The table below lists the required setup values required to initialize the LCD as specified by Example 2:
Example
Operating
Voltage,
V
DD
LCD Clock
Source
LCD Glass
Operating
Voltage
Required
LCD
segments
LCD
Frame
Rate
Blinking
Mode/Rate
Behavior in
STOP3 and
WAIT modes
LCD Power
Input
2 3.6 V Internal
39.063 kHz
3 V 100 50 Hz Alternate
0.5 Hz
WAIT: on
STOP: off
Power via
V
DD
Table 9-24. Initialization Register Values for Example 2
Register
bit or
bit field
Binary
Value
Comment
LCDSUPPLY
1-00--01
CPSEL 1 Enable charge pump
LADJ[1:0] 00 Configure LCD charge pump clock source
VSUPPLY[1:0] 01 Generate V
LL3
from V
DD
(See Table 9-19 )
LCDC1
0-----01 LCDIEN 0 LCD Frame Interrupts disabled
LCDWAI 0 LCD is “on” in WAIT mode
LCDSTP 1 LCD is “off” in STOP mode
LCDC0
01010011
LCDEN 0 Initialization is done before initializing the LCD module
SOURCE 1 Selects the alternate-clock reference as the LCD clock input (ALTCLK)
This clock source is configured by the ICS TRIM bits to be 39.063Khz.
LCLK[2:0] 010 For 1/4 duty cycle, select closest value to the desired 50 Hz LCD frame
frequency (
Table 9-13 )
DUTY[2:0] 011 For 100 segments (4x25), select 1/4 duty cycle
LCDBCTL
1XX-1100
BLINK 1 Blinking is turned on or off during LCD operation
ALT X Alternate bit is configured during LCD operation
BLANK X Blank bit is configured during LCD operation
BMODE 1 Blink Alternate = 1
BRATE[2:0] 100 Select.5 Hz blink frequency using Table 9-17
LCDPEN[5:0] LCDPEN0
LCDPEN1
LCDPEN2
LCDPEN3 11111111
11111111
11111111
00011111 29 LCD pins need to be enabled.