NXP Semiconductors MC9S08LG16, Reference Manual

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Chapter 1 Device Overview
MC9S08LG32 MCU Series, Rev. 5
Freescale Semiconductor 25
• TPMCLK — The TPMCLK is an optional external clock source for the TPM modules. The
TPMCLK must be limited to 1/4th of the frequency of the bus clock for synchronization. For more
information, see the “External TPM Clock Sources” section in
Chapter 16, “Timer/Pulse-Width
Modulator (S08TPMV3) .”
• TMRCLK — The TMRCLK is an optional external clock source for the MTIM module. For more
information, see
Chapter 17, “Modulo Timer (S08MTIMV1) .”
NOTE
ICSERCLK is a gated version of OSCOUT. ICSERCLK is not available in
STOP modes while OSCOUT is available if ERCLKEN and EREFSTEN
are set.
Figure 1-2. System Clock Distribution Diagram
TPM1 TPM2
SCI1 SCI2
BDC CPU ADC
FLASH
ICS
ICSOUT
÷
2
BUSCLK
ICSLCLK
ICSIRCLK
COP
* The fixed frequency clock (FFCLK) is internally
synchronized to the bus clock and must not
exceed one half of the bus clock frequency.
Flash has frequency
requirements for program
and erase operation. See the
electricals appendix for
details. ADC has min and max
frequency requirements.
See the ADC chapter and
electricals appendix for
details.
XOSC
EXTAL XTAL
FFCLK* ICSFFCLK
1 kHz
LPO
ICSERCLK
÷
2
IIC
DBG
SYNC*
LPOCLK
OSCOUT
LCD
TPMCLK
MTIM
TMRCLK
SPI
KBI
RTC