NXP Semiconductors MC9S08LG16, Reference Manual

Page: 34 / 373

Chapter 2 Pins and Connections
MC9S08LG32 MCU Series, Rev. 5
34 Freescale Semiconductor
2.3.3 RESET
After a power-on reset (POR), the PTC6/RESET pin defaults to RESET. Clearing RSTPE in SOPT1
configures the pin to be an output-only pin with an open-drain drive and an internal pullup device. RSTPE
is a write-once bit; so once written, it becomes read-only until the next reset. This bit is sticky and is reset
only at POR or LVD; it retains its value across other resets. When enabled, the RESET pin can be used to
reset the MCU from an external source when the pin is driven low.
Internal POR and low-voltage reset circuitry typically make external reset circuitry unnecessary. This pin
is normally connected to the standard 6-pin background debug connector, so a development system can
directly reset the MCU system. A manual external reset can be added by supplying a simple switch to
ground (pull reset pin low to force a reset).
Whenever any non-POR reset is initiated (whether from an external signal or from an internal system), the
enabled RESET pin is driven low for about 34 bus cycles. The reset circuitry decodes the cause of reset
and records it by setting a corresponding bit in the system reset status register (SRS).
NOTE
This pin does not contain a clamp diode to V
DD
and must not be driven
above V
DD
.
The voltage on the internally pulled up RESET pin, when measured, is
below V
DD
. The internal gates connected to this pin are pulled to V
DD
. If
the RESET pin is required to drive to a V
DD
level, an external pullup must
be used.
In EMC-sensitive applications, an external RC filter is recommended on the
RESET pin, if enabled.
2.3.4 Background / Mode Select (BKGD/MS)
During POR or background debug force reset (for more information, see Section 5.8.3, “System
Background Debug Force Reset Register (SBDFR) ”), the PTC5/BKGD/MS pin functions as a mode select
pin. Immediately after any reset, the pin functions as the background pin and can be used for background
debug communication. When BKGD/MS function is enabled with BKGDPE = 1, an internal pullup device
automatically becomes active. Clearing BKGDPE in SOPT1 configures the pin to be an output-only pin.
The background debug communication function is enabled when BKGDPE in SOPT1 is set. BKGDPE is
set following any reset of the MCU and must be cleared to use the PTC5/BKGD/MS pin’s alternative pin
functions.
After any reset, if nothing is connected to this pin, the MCU enters normal operating mode. If a debug
system is connected to the 6-pin standard background debug header, it can hold BKGD/MS low. It can do
this during a POR or after issuing a background debug force reset. This forces the MCU to active
background mode.
The BKGD/MS pin is used primarily with BDC communications, and features a custom protocol that uses
16 clock cycles of the target MCU’s BDC clock per bit time. The target MCU’s BDC clock can run as fast