NXP Semiconductors MC9S08LG16, Reference Manual

Page: 151 / 373

Chapter 8 Central Processor Unit (S08CPUV5)
MC9S08LG32 MCU Series, Rev. 5
Freescale Semiconductor 151
LDA # opr8i
LDA opr8a
LDA opr16a
LDA oprx16 ,X
LDA oprx8 ,X
LDA ,X
LDA
oprx16 ,SP
LDA oprx8 ,SP
Load Accumulator from Memory
A
←
(M)
IMM
DIR
EXT
IX2
IX1
IX
SP2
SP1
A6
B6
C6
D6
E6
F6
9E D6
9E E6
ii
dd
hh ll
ee ff
ff
ee ff
ff
2
3
4
4
3
3
5
4
pp
rpp
prpp
prpp
rpp
rfp
pprpp
prpp
0 1 1 – –
Þ Þ
–
LDHX # opr16i
LDHX opr8a
LDHX opr16a
LDHX ,X
LDHX
oprx16 ,X
LDHX oprx8 ,X
LDHX oprx8 ,SP
Load Index Register (H:X)
H:X
← (
M:M + $0001
)
IMM
DIR
EXT
IX
IX2
IX1
SP1
45
55
32
9E AE
9E BE
9E CE
9E FE
jj kk
dd
hh ll
ee ff
ff
ff
3
4
5
5
6
5
5
ppp
rrpp
prrpp
prrfp
pprrpp
prrpp
prrpp
0 1 1 – –
Þ Þ
–
LDX # opr8i
LDX opr8a
LDX opr16a
LDX oprx16 ,X
LDX oprx8 ,X
LDX ,X
LDX
oprx16 ,SP
LDX oprx8 ,SP
Load X (Index Register Low) from
Memory
X
←
(M)
IMM
DIR
EXT
IX2
IX1
IX
SP2
SP1
AE
BE
CE
DE
EE
FE
9E DE
9E EE
ii
dd
hh ll
ee ff
ff
ee ff
ff
2
3
4
4
3
3
5
4
pp
rpp
prpp
prpp
rpp
rfp
pprpp
prpp
0 1 1 – –
Þ Þ
–
LSL opr8a
LSLA
LSLX
LSL
oprx8 ,X
LSL ,X
LSL
oprx8 ,SP
Logical Shift Left
(Same as ASL)
DIR
INH
INH
IX1
IX
SP1
38
48
58
68
78
9E 68
dd
ff
ff
5
1
1
5
4
6
rfwpp
p
p
rfwpp
rfwp
prfwpp
Þ
1 1 – –
Þ Þ Þ
LSR opr8a
LSRA
LSR
X
LSR oprx8 ,X
LSR ,X
LSR
oprx8 ,SP
Logical Shift Right
DIR
INH
INH
IX1
IX
SP1
34
44
54
64
74
9E 64
dd
ff
ff
5
1
1
5
4
6
rfwpp
p
p
rfwpp
rfwp
prfwpp
Þ
1 1 – – 0
Þ Þ
MOV opr8a , opr8a
MOV opr8a ,X+
MOV # opr8i , opr8a
MOV ,X+, opr8a
Move
(M)
destination
←
(M)
source
In IX+/DIR and DIR/IX+ Modes,
H:X
←
(H:X) + $0001
DIR/DIR
DIR/IX+
IMM/DIR
IX+/DIR
4E
5E
6E
7E
dd dd
dd
ii dd
dd
5
5
4
5
rpwpp
rfwpp
pwpp
rfwpp
0 1 1 – –
Þ Þ
–
MUL
Unsigned multiply
X:A
←
(X)
×
(A)
INH
42
5
ffffp
– 1 1 0 – – – 0
Table 8-2. Instruction Set Summary (Sheet 6 of 10)
Source
Form
Operation
Ad
dr
ess
Mode
Object Code
Cyc
les Cyc-by-Cyc
Details
Affect
on CCR
V 1 1 H I N Z C
C
b0 b7
0
b0 b7
C 0