NXP Semiconductors MC9S08LG16, Reference Manual

Page: 32 / 373

Chapter 2 Pins and Connections
MC9S08LG32 MCU Series, Rev. 5
32 Freescale Semiconductor
Figure 2-4. Basic System Connections
BKGD/MS
RESET
OPTIONAL
MANUAL
RESET
V
DD
BACKGROUND HEADER
C
2
C
1
X1
R
F
R
S
SYSTEM
POWER
MC9S08LG32
V
DDA
/V
REFH
V
SSA
/V
REFL
C
BYAD
0.1 μ
F
V
DD
V
SS
C
BY
0.1
μ
F
C
BLK
10
μ
F
+
5 V
+
XTAL
EXTAL
NOTES:
1
RESET pin can only be used to reset into user mode, you can not enter BDM using RESET pin. To enter BDM, hold MS low
during POR or write a 1 to BDFR in SBDFR with MS low after issuing BDM command.
2
RC filter on RESET pin recommended for noisy environments.
3
When PTC6 is configured as RESET, pin becomes bi-directional with output being open-drain drive containing an internal
pullup device.
4
When PTC5 is configured as BKGD, pin becomes bi-directional.
5
LCD mode shown is for Charge pump enabled, other configurations are necessary for different LCD modes.
(NOTE 3)
(NOTE 4)
LCD Glass
V
LL1
V
LL2
V
CAP2
0.1
μ
F
0.1
μ
F
0.1 μ F
V
CAP1
0.1 μ F
V
LL3
LCD[44:0]
LCD
Module
LCD28/ADC5/TPMCLK/ PTA7
LCD25/ADC2/RX2/KBI5/ PTA4
POR
T
A
LCD24/ADC1/TX2/KBI4/ PTA3
LCD23/ADC0/SDA/ PTA2
LCD22/SCL/
PTA1
LCD21/ PTA0
POR
T
C
EXTAL/ PTF7
XTAL/ PTF6
TPM2CH4/KBI1/MISO/ PTF4
PO
R
T
F
TPM2CH5/KBI0/SS/ PTF3
ADC14/IRQ/TPM1CH1/SPSCK/ PTF2
ADC13/TPM1CH0/RX1/ PTF1
ADC12/TPM2CH2/KBI3/TX1/ PTF0
TPM2CH3/KBI2/MOSI/ PTF5
SPSCK/SDA/TPM2CH1/ PTI4
PO
R
T
I
MOSI/TPM2CH2/ PTI3
MISO/TPM2CH3/
PTI2
TX2/TMRCLK/
PTI1
RX2/
PTI0
SS/SCL/TPM2CH0/ PTI5
PO
R
T
D
POR
T
E
LCD[40:37]/ PTB[7:4]
LCD[32:29]/ PTB[3:0]
LCD[20:16]/ PTC[4:0]
LCD[7:0]/ PTD[7:0]
PO
R
T
B
LCD[15:8]/ PTE[7:0]
LCD[44:41]/ PTG[7:4]
LCD[36:33]/ PTG[3:0]
POR
T
G
ADC11/TPM1CH0/KBI3/TX1/
PTH5
ADC10/TPM1CH1/KBI2/RX1/ PTH4
ADC[9:6]/KBI[7:4]/ PTH[3:0]
TPM2CH4/KBI1/ PTH7
ADC15/KBI0/TPM2CH5/ PTH6
PO
R
T
H
BKGD/MS /PTC5
RESET_B /PTC6
LCD27/ADC4/TPM2CH1/KBI7/
PTA6
LCD26/ADC3/TPM2CH0/KBI6/
PTA5
Available only on 80-pin package
Available only on 64-pin and 80-pin package
*/ Default function out of reset /*