Chapter 3 Modes of Operation
MC9S08LG32 MCU Series, Rev. 5
Freescale Semiconductor
45
3.6.3
Active BDM Enabled in Stop Mode
Entry into active background mode from run mode is enabled if the ENBDM bit in BDCSCR is set. This
register is described in
Chapter 18, “Development Support
.” If ENBDM is set when the CPU executes a
STOP instruction, the system clocks to the background debug logic remain active when the MCU enters
the stop mode. Because of this, background debug communication remains possible. In addition, the
voltage regulator does not enter its low-power standby state, but maintains full internal regulation. If you
attempt to enter the stop2 mode with ENBDM set, the MCU enters the stop3 mode instead.
Most background commands are not available in the stop mode. The memory-access-with-status
commands do not allow memory access, but they report an error indicating that the MCU is in either stop
or wait mode. The BACKGROUND command can be used to wake the MCU from the stop mode and enter
the active background mode if the ENBDM bit is set. After entering the background debug mode, all
background commands are available.
3.6.4
LVD Enabled in Stop Mode
The LVD system can generate a reset or an interrupt when the supply voltage drops below the LVD or
LVW threshold respectively. If the LVD is enabled in stop (LVDE and LVDSE bits in SPMSC1 both set),
the voltage regulator remains active during stop mode. If you attempt to enter the stop2 mode with LVD
enabled for stop, the MCU enters the stop3 mode instead.
3.7
Mode Selection
Several control signals are used to determine the current operating mode of the device.
shows
the conditions for each of the device’s operating modes.
Table 3-2. Power Mode Selections
Mode of Operation
BDCSCR
BDM
SPMSC1
PMC
SPMSC2
PMC
CPU & Periph CLKs
Affects on
Sub-System
ENBDM
1
LVDE LVDSE
PPDC
BDM
Clock
Voltage
Regulator
RUN mode
0
x
x
x
On. ICS in any mode.
off
on
1
on
WAIT mode—(Assumes
WAIT instruction executed.)
0
x
x
x
CPU clock is off;
peripheral clocks on. ICS
state is same as RUN
mode.
off
on
1
on
Stop3—(Assumes STOPE
bit is set and STOP
instruction executed.) Note
that stop3 is used in place of
stop2 if the BDM or LVD is
enabled.
0
0
x
0
ICS in STOP. OSCOUT
optionally on.
2
off
standby
0
1
0
0
off
0
1
1
x
off
on—stop
currents
are
increased.
1
x
x
x
ICSLCLK still active.
on
Summary of Contents for MC9S08LG16
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Page 26: ...Chapter 1 Device Overview MC9S08LG32 MCU Series Rev 5 26 Freescale Semiconductor...
Page 40: ...Chapter 2 Pins and Connections MC9S08LG32 MCU Series Rev 5 40 Freescale Semiconductor...
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