NXP Semiconductors MC9S08LG16, Reference Manual

Page: 179 / 373

Chapter 8 LCD Module (S08LCDLPV1)
MC9S08LG32 MCU Series, Rev. 5
Freescale Semiconductor 179
9.4.1.4.1 1/2 Duty Multiplexed with 1/3 Bias Mode (Low-power Waveform)
Duty=1/2:DUTY[2:0] = 001
LCD pin 0 (LCD[0])and LCD pin 1, LCD[1] enabled as backplanes:
BPEN0 =1 and BPEN1 =1 in the LCDBPEN0
LCD[0] assigned to Phase A: LCDWF0 = 0x01
LCD[1] assigned to Phase B: LCDWF1 = 0x02
Figure 9-13. 1/2 Duty and 1/3 Bias (Low-Power Waveform)
LCD[0]/BP0
BP0-FPn (OFF)
LCD[1]/BP1
LCDWF[n]= 0x02
BP1-FPn (ON)
Base_Clk
1 Frame
Phase
B
= 00000010
B A A
Phase
B B A A
Phase
B B A A
Phase
B B A A
Frame Interrupt
V
LL1
V
LL3
0
V
LL2
V
LL1
V
LL3
0
V
LL2
V
LL1
V
LL3
0
V
LL2
V
LL1
V
LL3
0
V
LL2
-V
LL3
-V
LL1
-V
LL2
V
LL1
V
LL3
0
V
LL2
-V
LL3
-V
LL1
-V
LL2