NXP Semiconductors MC9S08LG16, Reference Manual

Page: 92 / 373

Chapter 5 Resets, Interrupts, and General System Control
MC9S08LG32 MCU Series, Rev. 5
92 Freescale Semiconductor
5.8.11 Pin Position Control Register (PINPS1)
This high-page register contains the control bits that determine which of the two possible pins is used as
the source for the indicated KBIx pin function. The default source is the pin available on the 48-pin
package.
7 6 5 4 3 2 1 0
R
KBI7 KBI6 KBI5 KBI4 KBI3 KBI2 KBI1 KBI0
W
Reset: 0 0 0 0 0 0 0 0
Figure 5-13. Pin Position Control Register (PINPS1)
Table 5-15. PINPS1 Register Field Descriptions
Field Description
8
KBI7
KBI7 Pin Position — This bit controls the pin position of KBI7.
0 KBI7 sourced from PTA6
1 KBI7 sourced from PTH3
7
KBI6
KBI6 Pin Position — This bit controls the pin position of KBI6.
0 KBI6 sourced from PTA5
1 KBI6 sourced from PTH2
6
KBI5
KBI5 Pin Position — This bit controls the pin position of KBI5.
0 KBI5 sourced from PTA4
1 KBI5 sourced from PTH1
5
KBI4
KBI4 Pin Position — This bit controls the pin position of KBI4.
0 KBI4 sourced from PTA3
1 KBI4 sourced from PTH0
4
KBI3
KBI3 Pin Position — This bit controls the pin position of KBI3.
0 KBI3 sourced from PTF0
1 KBI3 sourced from PTH5
3
KBI2
KBI2 Pin Position — This bit controls the pin position of KBI2.
0 KBI2 sourced from PTF5
1 KBI2 sourced from PTH4
2
KBI1
KBI1 Pin Position — This bit controls the pin position of KBI1.
0 KBI1 sourced from PTF4
1 KBI1 sourced from PTH7
1
KBI0
KBI0 Pin Position — This bit controls the pin position of KBI0.
0 KBI0 sourced from PTF3
1 KBI0 sourced from PTH6