-
42
-
8-3-14.
RENV3
register
This
register
holds
environment
setting
3.
Specify
the
counter
function,
latch
function,
and
simultaneous
start
function.
Bit
Bit
name
Description
0
CIS1
Enable
input
counting
on
COUNTER1
0:
Output
pulse
1:
EA/EB
input
1
CIS2
Enable
input
counting
on
COUNTER2
0:
EA/EB
input
1:
Output
pulse
2
CU1H
1:
Stops
counting
by
COUNTER1.
3
CU2H
1:
Stops
counting
by
COUNTER2.
4
CU1L
1:
Resets
COUNTER1
while
latching
the
contents
of
COUNTER1.
5
LOF1
1:
Stop
latching
the
contents
of
COUNTER1
with
the
LTC
input.
(Only
effective
for
software.)
6
CU1R
1:
Latches
(and
resets)
COUNTER1
when
a
zero
return
operation
is
complete.
7
C1RM
1:
Set
COUNTER1
to
ring
counter
operation
using
Comparator
1.
8
CU2L
1:
Resets
COUNTER2
while
latching
the
contents
of
COUNTER2.
9
LOF2
1:
Stop
latching
the
contents
of
COUNTER2
with
the
LTC
input.
(Only
effective
for
software.)
10
CU2R
1:
Latches
(and
resets)
COUNTER2
when
a
zero
return
operation
is
complete.
11
C2RM
1:
Set
COUNTER2
to
ring
counter
operation
using
Comparator
2.
12
to
13 C1S0
to
1 Select
a
comparison
method
for
Comparator
1
00:
Turn
the
comparator
function
off.
01:
RCMP1
data
=
Comparison
counter
10:
RCMP1
data
>
Comparison
counter
11:
RCMP1
data
<
Comparison
counter
14
to
15 C2S0
to
1 Select
a
comparison
method
for
Comparator
2
00:
Turn
the
comparator
function
off.
01:
RCMP2
data
=
Comparison
counter
10:
RCMP2
data
>
Comparison
counter
11:
RCMP2
data
<
Comparison
counter
16
to
19 SYO0
to
3 Select
the
output
timing
for
the
internal
synchronizing
signal.
0001:
When
the
Comparator
1
conditions
are
met.
0010:
When
the
Comparator
2
conditions
are
met.
1000:
When
starting
acceleration.
1001:
When
ending
acceleration.
1010:
When
starting
deceleration.
1011:
When
ending
deceleration.
Others:
Do
not
output
the
internal
synchronizing
signal.
20
to
21
SYI0
to
1 Specify
which
axis
will
provide
the
PCL
with
the
internal
synchronization
signal.
00:
Internal
synchronizing
signal
output
by
the
X
axis.
01:
Internal
synchronizing
signal
output
by
the
Y
axis.
10:
Internal
synchronizing
signal
output
by
the
Z
axis.
11:
Internal
synchronizing
signal
output
by
the
U
axis
22
to
31 Not
defined (Always
set
to
0.)
Summary of Contents for PCL6113
Page 1: ...User s Manual For PCL6113 6123 6143 Pulse Control LSI Nippon Pulse Motor Co Ltd...
Page 11: ...5 3 Terminal Assignment Diagram 3 1 PCL6113 3 2 PCL6123...
Page 20: ...14 5 Block Diagram...
Page 115: ...109 11 Stop timing by error...
Page 116: ...110 13 External Dimensions 13 1 PCL6113...
Page 117: ...111 13 2 PCL6123...
Page 118: ...112 13 3 PCL6143...
