NPM PCL6113, User Manual

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Bits Bit name Description
18 EINF 1: Apply a noise filter to EA/EB/EZ input.
Ignores pulse inputs less than 3 CLK signal cycles long.
19 EDIR 1: Reverse the counting direction of the EA/EB inputs.
20 to 21 PIM0 to 1 Specify the PA/PB input operation.
00: Multiply a 90
o
phase difference by 1 (Count up when the PA input phase is
ahead.)
01:
Multiply a 90
o
phase difference by 2 (Count up when the PA input phase is
ahead.)
10:
Multiply a 90
o
phase difference by 4 (Count up when PA input phase is ahead.)
11: Count up when the EA signal rises, count down when the PB signal falls.
22 PINF 1: Apply a noise filter to PA/PB input. Note 3.
Ignore pulse inputs less than 3 CLK signal cycles long.
23 PDIR 1: Reverse the counting direction of the PA/PB inputs.
24 to 27 EZD0 to 3 Specify an EZ count value to be used for zero return.
0000 (1st time) to 1111 (16th time)
28 EZL Specify EZ signal input logic. (0: Falling edge. 1: Rising edge.)
29 ORM Select a zero return method.
0: Zero return operation 0
- Immediately stops by turning the ORG input from OFF to ON. (Decelerates
and stops when at high speed.)
- COUNTER reset timing: When the ORG input changes from OFF to ON.
1: Zero return operation 1
- When the PCL is feeding at constant speed, after the ORG input turns from
OFF to ON it will stop immediately by counting up the EZ signals.
When the PCL is feeding at high speed, it will decelerate by turning the ORG
input from OFF to ON and then immediately stop by counting up the EZ
signals.
- COUNTER reset timing: When counting up the EZ signals.
30 IEND 1: Outputs an INT signal when stopping, regardless of whether the stop was normal
or due to an error.
31 Not
defined
(Always specify 0.)