NPM PCL6113, User Manual

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4. Functions of Terminals
Note 1: The letter "n" at the end of each signal name stands for an axis name (x, y, z, or u). (Ex.: ELLn etc.)
Note 2: In the "IN/OUT" column, "IN" indicates an input terminal and "OUT" indicates an output terminal. "I/O"
indicates a bi-directional terminal.
Note 3: The logic column indicates the signal logic: Positive or Negative. "P" and "N" are default initial values
that can be changed with software. "H" is a hardware setting.
Note 4: The "Handling" column describes how to deal with terminals when they are not used. (Some
terminals must be controlled, even when they are being used.)
"OP" means leave open (disconnected). "PU" means pull up. "PD" means pull down. "+V" must be
connected to VDD or pulled up. "GN" means a connection to GND. The pull up/down resistance
values should be in the range of 5 k to 10 k-ohms.
Terminal No.
Signal name
PCL
6113
PCL
6123
PCL
6143
Input/
output
Logic
Treat
-ment
Description
GND 10,
19,
29,
43,
55,
65,
70,
80
11, 20,
30, 44,
56, 66,
81, 93,
103, 114,
128
12, 21,
31, 45,
57, 67,
83, 93,
107,
119
129,
145
155,
162
176
Power
source Supply a negative power.
Make sure to connect all of these terminals.
VDD 3, 14,
24,
34,
50,
60,
68,
73
3, 15,
25, 35,
51, 61,
72, 88,
98, 112,
120
3, 16,
26, 36,
52, 62,
76, 88,
98, 114,
124,
138,
150,
160,
164
Power
source Supply +3.3 VDC power.
The allowable power supply range is +3.3
VDC ±10%.
Make sure to connect all of these terminals.
79 127 175 Input Negative Input reset signal.
Make sure to set this signal LOW after turning
ON the power and before starting operation.
Input and holding low for at least 8
cycles of the reference clock.
For details about the chip's status after a
reset, see section 11-1, "Reset", in this
manual.
CLK 69 113 163 Input As standard, input a 19,6608 MHz reference
clock signal.
The LSI creates output pulses based on the
clock input on this terminal.