-
30
-
7-5.
General-purpose
output
port
control
command
By
writing
an
output
control
command
to
the
output
port
(OTPB:
Address
2
when
using
an
8-bit-I/F
interface),
the
PCL
will
control
the
output
of
the
P0
to
P7
terminals.
When
the
I/O
setting
for
P0
to
P7
is
set
to
output,
the
PCL
will
output
signals
from
terminals
P0
to
P7
to
issue
the
command.
When
writing
words
to
the
port,
the
upper
8
bits
are
discarded.
However,
they
should
be
set
to
zero
to
maintain
future
compatibility.
The
output
status
of
terminals
P0
to
P7
are
latched,
even
after
the
I/O
setting
is
changed
to
input.
The
output
status
for
each
terminal
can
be
set
individually
using
the
bit
control
command.
7-5-1.
Command
writing
procedures
Write
control
data
to
output
port
(OTPB:
Address
2
when
an
8-bit-I/F
is
used).
To
continue
with
the
next
command,
the
LSI
must
wait
for
four
reference
clock
cycles
(approx.
0.2
µsec
when
CLK
=
19.6608
MHz).
The
terminal
outputs
a
wait
request
signal.
7-5-2.
Command
bit
allocation
Output P0
Output P1
Output P2
Output P3
Output P4
Output P5
Output P6
Output P7
0: Low level 1: High level
7 6 5 4 3 2 1 0
OTP7 OTP6 OTP5 OTP4 OTP3 OTP2 OTP1 OTP0
Summary of Contents for PCL6113
Page 1: ...User s Manual For PCL6113 6123 6143 Pulse Control LSI Nippon Pulse Motor Co Ltd...
Page 11: ...5 3 Terminal Assignment Diagram 3 1 PCL6113 3 2 PCL6123...
Page 20: ...14 5 Block Diagram...
Page 115: ...109 11 Stop timing by error...
Page 116: ...110 13 External Dimensions 13 1 PCL6113...
Page 117: ...111 13 2 PCL6123...
Page 118: ...112 13 3 PCL6143...
