-
91
-
Counter
reset
command
<CUN1R
to
CUN2R:
Bit
control
command>
20h:
Reset
COUNTER1.
21h:
Reset
COUNTER2.
[Bit
control
command]
20h
21h
Note:
When
the
latch
&
clear
function
is
used,
and
if
the
clear
(or
latch)
timing
matches
the
count
timing,
the
counter
will
not
become
0.
It
will
be
+1
or
-1.
When
detecting
"0"
using
the
comparate
function,
be
careful
of
these
cases.
11-9-3.
Stop
the
counter
There
are
two
methods
for
stopping
counters:
stop
the
count
operation
or
set
a
mask
on
the
counter
input.
The
counter
operation
can
be
stopped
for
independently
COUNTER1
and
COUNTER2.
Selection
of
the
counter
input
is
not
related
to
stopping.
When
the
count
input
is
masked,
the
input
to
the
selected
counter
will
be
stopped.
A
counter
which
is
counting
output
pulses
will
stop
counting
if
the
timer
mode
is
selected,
regardless
of
the
counter
stop
method
selected
or
the
setting
status.
If
a
counter
is
counting
output
pulses
and
PMSK
=
1
in
the
RENV1
register,
the
PCL
will
not
output
pulses.
However,
the
counter
will
continue
counting
unless
it
is
told
to
stop.
Stopping
COUNTER1
<Set
CU1H
(bits
2)
in
RENV3>
1.
Stop
COUNTER1
counting
operation.
[RENV3]
(WRITE)
7
0
-
-
-
-
-
n
-
-
Stopping
COUNTER2
<Set
CU2H
(bits
3)
in
RENV3>
1.
Stop
COUNTER2
counting
operation.
[RENV3]
(WRITE)
7
0
-
-
-
-
n
-
-
-
Set
the
count
input
mask
for
output
pulses
<Set
MCCE
(bit
11)
in
RMD>
1:
The
counters
set
to
count
"output
pulses"
will
stop.
[RMD]
(WRITE)
15
8
-
-
-
-
n
-
-
-
Set
the
EA/EB
signal
input
mask
<Set
E0FF
(bit
14)
in
RENV2>
1:
Disable
the
EA/EB
input.
[RENV2]
(WRITE)
15
8
-
n
-
-
-
-
-
-
Summary of Contents for PCL6113
Page 1: ...User s Manual For PCL6113 6123 6143 Pulse Control LSI Nippon Pulse Motor Co Ltd...
Page 11: ...5 3 Terminal Assignment Diagram 3 1 PCL6113 3 2 PCL6123...
Page 20: ...14 5 Block Diagram...
Page 115: ...109 11 Stop timing by error...
Page 116: ...110 13 External Dimensions 13 1 PCL6113...
Page 117: ...111 13 2 PCL6123...
Page 118: ...112 13 3 PCL6143...
