-
98
-
11-12.
Output
an
interrupt
signal
This
LSI
can
output
an
interrupt
signal
(
signal)
:
There
are
9
types
of
errors,
14
types
of
events,
and
change
from
operating
to
stop
that
can
cause
an
signal
to
be
output
.
All
of
the
error
causes
will
always
output
an
signal.
Each
of
the
event
causes
can
be
set
in
the
RIRQ
register
to
output
an
signal
or
not.
A
stop
interrupt
is
a
simple
interrupt
function
which
produces
an
interrupt
separate
from
a
normal
stop
or
error
stop.
For
a
normal
stop
interrupt
to
be
issued,
the
confirmation
process
reads
the
RIST
register
as
described
in
the
Cause
of
an
Event
section.
If
your
system
needs
to
provide
a
stop
interrupt
whenever
a
stop
occurs,
it
is
easy
to
use
the
stop
interrupt
function.
The
signal
is
output
continuously
until
all
the
causes
on
all
the
axes
that
produced
interrupts
have
been
cleared.
An
interrupt
caused
by
an
error
is
cleared
by
writing
a
"REST
(error
cause)
register
read
command."
An
interrupt
caused
by
an
event
is
cleared
by
writing
a
"RIST
(event
cause)
register
read
command."
A
Stop
interrupt
is
cleared
by
writing
to
the
main
status.
To
determine
which
type
of
interrupt
occurred,
on
which
axis
and
the
cause
of
the
interrupt,
follow
the
procedures
below.
1)
Read
the
main
status
of
the
X
axis
and
check
whether
bits
2,
4,
or
5
is
"1."
2)
If
bit
2
(SENI)
is
"1,"
a
Stop
interrupt
occurs.
3)
If
bit
4
(SERR)
is
"1,"
read
the
RESET
register
to
identify
the
cause
of
the
interrupt.
4)
If
bit
5
(SINT)
is
"1,"
read
the
RIST
register
to
identify
the
cause
of
the
interrupt.
5)
Repeat
steps
1)
to
4)
above
for
the
Y,
Z,
and
U
axes.
The
steps
above
will
allow
you
to
evaluate
the
cause
of
the
interrupt
and
turn
the
output
OFF.
Note
1:
When
reading
a
register
from
the
interrupt
routine,
the
details
of
the
input/output
buffer
will
change.
If
the
signal
is
output
while
the
main
routine
is
reading
or
writing
registers,
and
the
interrupt
routine
starts,
the
main
routine
may
produce
an
error.
Therefore,
the
interrupt
routine
should
execute
a
PUSH/POP
on
input/output
buffer.
Note
2:
While
processing
all
axes
in
steps
1)
to
4)
above,
it
is
possible
that
another
interrupt
may
occur
on
an
axis
whose
process
has
completed.
In
this
case,
if
the
CPU
interrupts
reception
mode,
and
is
set
for
edge
triggering,
the
PCL
will
latch
the
output
ON
and
it
will
not
allow
a
new
interrupt
to
interfere.
Therefore,
make
sure
that
after
you
have
reset
the
interrupt
reception
status
the
CPU
reads
main
status
of
all
the
axes
again.
Also,
make
sure
there
is
no
signal
output
from
the
PCL.
Then,
end
the
interrupt
routine.
Note
3:
When
not
using
the
terminal,
leave
it
open.
When
using
more
than
one
PCL,
the
terminals
cannot
be
wired
ORed.
The
signal
output
can
be
masked
by
setting
the
RENV1
(environment
setting
1)
register.
If
the
output
is
masked
(INTM
=
1),
and
when
the
interrupt
conditions
are
satisfied,
the
status
will
change.
However,
the
signal
will
not
go
LOW,
but
will
remain
HIGH.
While
the
interrupt
conditions
are
satisfied
and
if
the
output
mask
is
turned
OFF
(INTM
=
0
in
RENV1),
the
signal
will
go
LOW.
Summary of Contents for PCL6113
Page 1: ...User s Manual For PCL6113 6123 6143 Pulse Control LSI Nippon Pulse Motor Co Ltd...
Page 11: ...5 3 Terminal Assignment Diagram 3 1 PCL6113 3 2 PCL6123...
Page 20: ...14 5 Block Diagram...
Page 115: ...109 11 Stop timing by error...
Page 116: ...110 13 External Dimensions 13 1 PCL6113...
Page 117: ...111 13 2 PCL6123...
Page 118: ...112 13 3 PCL6143...
