Lucent Technologies DSP1611, Information Manual

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Information Manual DSP1611/17/18/27/28/29 DIGITAL SIGNAL PROCESSOR
April 1998 Hardware Architecture
Lucent Technologies Inc.
DRAFT COPY
2-21
2.6 Serial Input/Output (SIO) Units
(continued)
The following are some of the features of the SIO units:
Strobes and clocks are either active or passive (driven by the DSP or from off-chip) to provide interface flexibility.
Four selectable active clock speeds allow a variety of throughput rates.
8- or 16-bit data is supported.
Input and output can be independently chosen to shift either MSB or LSB first.
Input and output are independently configured.
2.7 Parallel Input/Output (PIO) (DSP1617 Only)
The DSP1617 has an 8-bit parallel I/O interface for rapid transfer of data with external devices such as other DSPs,
microprocessors, or peripheral I/O devices. Minimal or no additional logic is required to interface with peripheral
devices, and data rates of up to 20 Mbytes/s are obtained at an instruction cycle of 25 ns. Two maskable interrupts
are associated with the PIO unit. Although there is only one physical PIO port, there are eight logical PIO ports
pdx<0—7>. One of the eight logical ports is signaled by the state of the peripheral select pins (PSEL[2:0]). The
PIO is fully described in
Chapter 8 , Parallel I/O (DSP1617 Only) .
The data path of the PIO contains the 8-bit input buffer pdxin and the 8-bit output buffer pdxout. In passive mode,
there are two pins that indicate the state of these buffers: the parallel input buffer full (PIBF) and the parallel output
buffer empty (POBE). The pdxin register is shadowed in some modes to allow the PIO to accept data on an inter-
rupt without disrupting its normal operation. In addition, there are two registers used to control and monitor the
PIO's operation: the parallel I/O control (pioc) register and the PIO status (PSTAT) register. The PSTAT register
can only be read by an external device, and it reflects the condition of the PIO. The pioc contains information
about interrupts and can be used to set the PIO in a variety of modes. Strobe widths are programmable through
the strobe field in the pioc. The PIO is accessed in two basic modes, active or passive. Input or output can be
configured in either of these modes independently. In active mode, the DSP is in control and provides the strobes.
In passive mode, the external device provides the strobes.
2.8 Parallel Host Interface (PHIF) (DSP1611/18/27/28/29 Only)
The PHIF is a passive 8-bit parallel port that can interface to an 8-bit bus containing other Lucent DSPs, micropro-
cessors, or peripheral I/O devices. The PHIF port supports
Motorola
1
or Intel
2
protocols and 8- or 16-bit transfers
configured in software. The port data rate depends on the instruction cycle rate. A 25 ns instruction cycle allows
the PHIF to support data rates up to 16 Mbytes/s assuming the external host device can transfer 1 byte of data in
25 ns.
The PHIF is accessed in two basic modes, 8- and 16-bit modes. In 16-bit mode, the host determines an access of
the high or low byte. In 8-bit mode, only the low byte is accessed. Software-programmable features provide a
glueless host interface to microprocessors. The PHIF is fully described in
Chapter 9 , Parallel Host Interface (PHIF)
(DSP1611/18/27/28/29 Only) .
1. MC68000 is a trademark and Motorola is a registered trademark of Motorola, Inc.
2. Intel and Intellec are registered trademarks of Intel Corporation.