DSP1611/17/18/27/28/29 DIGITAL SIGNAL PROCESSOR
Information Manual
Instruction Set Summary
April 1998
B-13
DRAFT COPY
Lucent Technologies Inc.
R = Y
(load register from Y-space memory)
perform (R)
←
(*rM); then
modify rM
The contents of register R are replaced with the current contents of the Y-space memory location pointed to by rM
where rM is specified by the two most significant bits of the Y field:
00 - r0
01- r1
10 - r2
11 - r3
The value of rM is then postmodified where the postmodification is specified by the two least significant bits of the
Y field.
Register R is one of the general sets of registers listed under the long immediate load.
Note: Writing the psw also writes the a0 and a1 guard bits.
Notes:
1. If y, yl, or x are the destination registers (R), the assembler assembles this instruction as a single-cycle multiply/
ALU instruction. If a two-cycle move encoding is necessary, the optional mnemonic move may be used. For
example:
move y = *r1 forces a move encoding
2. R = pop(*rM) is a different assembly-language form for two statements:
*rM– – followed by R = *rM and is used for stack operations. The pointer register rM is decremented, and data
is written from the new memory location to the register R. The decrement instruction is not interruptible.
2 LSBs of Y
Action
Symbol
00
no action
*rM
01
postincrement
*rM++
10
postdecrement
*rM– –
11
†
† Code 11, in this case, means add the current value of the j regis-
ter to rM after accessing *rM.
postincrement by (j)
*rM++j
Bit
15
14
13
12
11
10
9—4
3—0
Field
0
1
1
1
1
0
R
Y
Words: 1
Cycles: 2
Group: Data Move
Addressing: Register, Register Indirect
Flags affected: None
Interruptible: Yes
Cacheable: Yes
Format: 7
Summary of Contents for DSP1611
Page 18: ...Chapter 1 Introduction...
Page 27: ...Chapter 2 Hardware Architecture...
Page 52: ...Chapter 3 Software Architecture...
Page 116: ...Chapter 4 Instruction Set...
Page 154: ...Chapter 5 Core Architecture...
Page 176: ...Chapter 6 External Memory Interface...
Page 208: ...Chapter 7 Serial I O...
Page 237: ...Chapter 8 Parallel I O DSP1617 Only...
Page 261: ...Chapter 9 Parallel Host Interface PHIF DSP1611 18 27 28 29 Only...
Page 275: ...Chapter 10 Bit I O Unit...
Page 284: ...Chapter 11 JTAG Test Access Port...
Page 306: ...Chapter 12 Timer...
Page 313: ...Chapter 13 Bit Manipulation Unit...
Page 325: ...Chapter 14 Error Correction Coprocessor DSP1618 28 Only...
Page 350: ...Chapter 15 Interface Guide...
Page 367: ...Appendix A Instruction Encoding...
Page 379: ...Appendix B Instruction Set Summary...
Page 381: ...aD extractz aS IM16 B 52 aD insert aS arM B 53 aD insert aS IM16 B 54 aD aS aaT B 55...
Page 437: ...Index...