Lucent Technologies DSP1611, Information Manual

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DSP1611/17/18/27/28/29 DIGITAL SIGNAL PROCESSOR Information Manual
Instruction Set Summary April 1998
B-15
DRAFT COPY
Lucent Technologies Inc.
Z : R
(exchange register with Y-space memory)
temp
←
(R); then
(R)
←
(*rM); then
modify rM (first action); then
(*rM)
←
temp; then
modify rM (second action)
The contents of the Y-space memory location(s) pointed to by rM are exchanged with the current contents of regis-
ter R, which are sign- or zero-extended to 16 bits if necessary. The pointer rM is modified after each of the two
memory accesses according to bits zero and one of the Z field. rM is specified by bits two and three of the Z field:
00 - r0 01 - r1 10 - r2 11 - r3
The available options for the postmodification are specified by the two least significant bits of the Z field as follows:
Register R is one of the general sets of registers listed under the long immediate load instruction. Register sources
c0, c1, and c2 are less than 16 bits and are sign-extended. Register source auc is less than 16 bits and is zero-
extended.
Note: Writing the psw also writes the a0 and a1 guard bits.
Note: R and rM must not be the same register (e.g., r2pz : r2). The eight logical PIO registers pdx0 through pdx7
cannot be used in compound data moves.
Symbol 2 LSBs of Z First Action Second Action
*rMzp 00 no action (zero) postincrement (plus)
*rMpz 01 postincrement (plus) no action (zero)
*rMm2 10 postdecrement (minus) postincrement by two (+2)
*rMjk 11 †
† Code 11, in this case, means add the current value of the j register to rM after reading *rM, and then add the
current value of the k register to rM after writing *rM.
postincrement by (j) postincrement by (k)
Bit 15 14 13 12 11 10 9—4 3—0
Field
0 1 1 0 1 X R Z
Words: 1
Cycles: 2
Group: Data Move
Addressing: Register, Register Indirect
Flags affected: None
Interruptible: Yes
Cacheable: Yes
Format: 7