Lucent Technologies DSP1611, Information Manual

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Information Manual DSP1611/17/18/27/28/29 DIGITAL SIGNAL PROCESSOR
April 1998 Software Architecture
Lucent Technologies Inc.
DRAFT COPY
3-61
3.6 Power Management
(continued)
3.6.6 Power Management Examples (continued)
Sleep with Slow Internal Clock, PLL Running. In this case, the ring oscillator is selected to clock the processor
before the device is put to sleep. This reduces power dissipation while waiting for an interrupt to continue program
execution.
powerc=0x40F0 /* Turn off peripherals and select slow clock */
2*nop /* Wait for slow clock to take effect */
sleep:a0=0x8000 /* Set alf register in cache loop if running from */
do 1 { /* external memory with >1 wait-state */
alf=a0 /* Stop internal processor clock, interrupt circuits*/
nop /* active */
}
nop /* Needed for bedtime execution. Only sleep power plus PLL
*/
nop /* power consumed here... Interrupt wakes up the device.
*/
next: . . . /* User code executes here */
powerc=0x00F0 /* Select high-speed PLL based clock */
2*nop /* Wait for it to take effect */
powerc=0x0000 /* Turn the peripheral units back on */
Sleep with Slow Internal Clock and Crystal Oscillator/Small-Signal Disabled, PLL Disabled. If the target
device contains the crystal oscillator or the small-signal clock option, the clock input circuitry can be powered down
to further reduce power. In this case, the slow clock must be selected first and then the PLL must be disabled
because the PLL cannot run without the clock input circuitry being active.
powerc=0x40F0 /* Turn off peripherals and select slow clock */
2*nop /* Wait for slow clock to take effect */
pllc=0x29F2 /* Disable PLL (assume N=1, M=20, LF=1001) */
powerc=0xC0F0 /* Disable crystal oscillator */
sleep:a0=0x8000 /* Set alf register in cache loop if running from */
do 1 { /* external memory with >1 wait-state */
alf=a0 /* Stop internal processor clock, interrupt circuits*/
nop /* active */
}
nop /* Needed for bedtime execution. Only sleep power plus PLL
*/
nop /* power consumed here... Interrupt wakes up the device.
*/
powerc=0X40F0 /* Clear XTLOFF, leave PLL disabled */
call xtlwait /* Wait until crystal oscillator/small-signal is stable*/
pllc=0xE9F2 /* Enable PLL, continue to run off slow clock */
call pllwait /* Loop to check for LOCK flag assertion */
next: powerc=0x00F0 /* Select high-speed PLL based clock */
2*nop /* Wait for it to take effect */
powerc=0x0000 /* Turn the peripheral units back on */