Lucent Technologies DSP1611, Information Manual, Page: 160 / 443

Information Manual DSP1611/17/18/27/28/29 DIGITAL SIGNAL PROCESSOR
April 1998 Core Architecture
Lucent Technologies Inc.
DRAFT COPY
5-5
5.1 Data Arithmetic Unit
(continued)
5.1.5 Counters (continued)
The following code segment example illustrates the use of c1 as a loop counter:
c1 = 1-4 /* Initialize counter to 1-4 = -3 */
loop:
instruction
instruction
if c1lt goto loop /* If c1 < 0, condition lt (less than 0) is met..., */
/* c1 increments and control goes to loop. If c1 = 0, */
/* condition not met, and control goes on to next. */
/* The loop is executed four times. */
next:
This following code example demonstrates nested loops that loop through the outer loop eight times and through
the inner loop four times for each outer loop.
c0 = 1-8 /* initialize c0 to 1-8 = -7 */
outerloop: instruction /* do operations in outerloop */
c1 = 1-4 /* initialize c1 to 1-4 = -3 */
innerloop: instruction /* do operations in innerloop */
if c1lt goto innerloop /* repeat innerloop, for c1; if c1 = 0, */
instruction /* go on more outerloop ops */
if c0lt goto outerloop /* repeat outerloop, for c0; if c0 = 0, */
next: /* go to next */
Another way to use the counters is with the ifc CON F2
1
special function group instruction. This instruction auto-
matically generates the following sequence:
1. Tests the condition CON
2
. Increments counter c1.
2. If true, performs operation F2 and loads c2 with the number in c1.
3. If false, goes onto next instruction.
Figure 5-3, on page 5-6 illustrates using the counter with special function instructions. c2 is a holding register for
c1. c1 continues to increment and c2 receives the count in c1 if a true condition occurs. No instructions increment
c2 because its only use is as a holding register for c1.
1.See Section 4.5.4 for a description of the special function instruction group.
2.CON is any conditional (see Section 4.5.1 ).
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