Lucent Technologies DSP1611, Information Manual, Page: 161 / 443

DSP1611/17/18/27/28/29 DIGITAL SIGNAL PROCESSOR Information Manual
Core Architecture April 1998
5-6
DRAFT COPY
Lucent Technologies Inc.
5.1 Data Arithmetic Unit
(continued)
5.1.5 Counters (continued)
Figure 5-3. The ifc CON F2 Instruction
Note: The ifc CON F2 operates as described above even if the CON condition is a counter conditional. For exam-
ple, the instruction ifc c0lt F2 does not increment counter c0.
Table 5-2 summarizes the functions of c0, c1, and c2.
Table 5-2. c0—c2 Register Functions
Register Function Value Affected By
c0 General-purpose
incrementing counter Increments by one whenever an instruction of the form
if c0ge Instruction or if c0lt Instruction executes.
c1 General-purpose
incrementing counter Increments by one whenever an instruction of the form
if c1ge Instruction or if c1lt Instruction executes.
Special function
incrementing counter Increments by one whenever an instruction of the form
ifc CON F2_Instruction executes
†
.
† CON is any conditional (see Section 4.5.1 )
.
See Section 4.5.4 for a description of the special function (F2) instruction group.
c2 Holding register for
c1 Copies the value of c1 into c2 whenever an instruction of the form
ifc CON F2_Instruction executes and the condition CON is true
†
.
c1
←
c1 + 1
CON ?
Execute
F2/F2E_function
true
false
c2
←
c1
ifc CON F2_function
c1
←
c1 + 1