Lucent Technologies DSP1611, Information Manual

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DSP1611/17/18/27/28/29 DIGITAL SIGNAL PROCESSOR Information Manual
Error Correction Coprocessor (DSP1618/28 Only) April 1998
14-8
DRAFT COPY
Lucent Technologies Inc.
14.5 Software Architecture
14.5.1 R-Field Registers
The ECCP registers are grouped into two categories: the R-field registers and the internal memory-mapped regis-
ters.
Figure 14-4 is a functional block diagram of the R-field registers (edr, eir, and ear) and the internal memory-
mapped registers. The R-field registers are directly accessible from the DSP program. Through these registers,
the memory-mapped registers are indirectly accessed for data transfer and control. As seen in
Figure 14-4 , the
DSP can write an address to ear. A subsequent DSP write to edr will place data in the internal register addressed
by ear and increment ear by one count. Similarly, a DSP read from edr will fetch data from the internal register
addressed by ear and increment ear by one count. The DSP writes instructions directly to the eir register to start a
particular operation of the ECCP.
5-4503
Figure 14-4. Register Block Diagram
The three R-field registers ear, edr, and eir are defined in the core instruction set as programmable registers for
executing the ECCP and establishing the data interface between the ECCP and the core. Reserved bits are
always zero when read and should be written with zeros to make the program compatible with future chip revisions.
Address Register (ear): The address register holds the address of the ECCP internal memory-mapped registers.
Each time the core accesses an internal ECCP register through edr, the content of the ear register is postincre-
mented by one. During a DSP compound addressing instruction, the same edr register is accessed for both the
read and the write operation.
edr
eir
ear
+ 1
MUX/
DEMUX
NS[63:0]
PS[63:0]
SYC
ECON
TBLR
S0H0
DSR
ZIG10
ZQG32
G54
MDX
MACH
MACL
TSBR
DSP CORE ECCP
IDB
ADDRESSES 0x0000 TO 0x0410
S5H5
… …