Lucent Technologies DSP1611, Information Manual, Page: 252 / 443

DSP1611/17/18/27/28/29 DIGITAL SIGNAL PROCESSOR Information Manual
Parallel I/O (DSP1617 Only) April 1998
8-14
DRAFT COPY
Lucent Technologies Inc.
8.2 Programmer Interface
The PIO port can be accessed with the data move group of instructions. The eight logical ports (pdx0—pdx7) cor-
respond to the encoding on the 3-bit field formed by the pins PSEL[2:0]. For example, an access to pdx3 will result
in the 3-bit field 011 appearing on the three pins (PSEL[2:0]) in active-active mode. The complete encoding of the
ports is shown in
Table 8-5 .
When programming the device, nine PIO registers can be referenced:
pioc
PIO control register.
pdx0 Logical port 0.
pdx1 Logical port 1.
pdx2 Logical port 2.
pdx3
Logical port 3.
pdx4 Logical port 4.
pdx5 Logical port 5.
pdx6 Logical port 6.
pdx7 Logical port 7.
Note: pdx0—pdx7 all reference the same physical registers—pdx[IN] and pdx[OUT]. A read instruction accesses
pdx[IN], and a write instruction accesses pdx[OUT]. For example:
*r0=pdx1 /* writes memory from pdx(in) */
pdx3=*r0 /* reads memory to pdx(out) */
Table 8-5. Port Encoding pdx<0—7>
PODS PIDS PSEL2 PSEL1 PSEL0 Port pdx<0—7>
Active Active 0
0
0
0
1
1
1
1 0
0
1
1
0
0
1
1 0
1
0
1
0
1
0
1 0
1
2
3
4
5
6
7
Active Passive x
x
x
x 0
0
1
1 0
1
0
1 0, 4
1, 5
2, 6
3, 7
Passive Active x
x x
x 0
1 0, 2, 4, 6
1, 3, 5, 7
Passive Passive x x x 0—7