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CHAPTER 23 512K / 1024K BIT FLASH MEMORY
[bit4] RDY (Ready)
This bit is the flash memory write/delete permission bit.
While this bit is "0", the write/delete cannot be executed to the flash memory. Even in this state,
however, suspend commands such as the read/reset command and the sector deletion temporary stop
can be accepted.
0: During the write/delete operation
1: Write/delete operation terminated (Next data write/delete operation permitted)
[bit3, bit1] Reserved bits
These bits are the reserved bits for testing. When these bits are usually used, they must be set to "0".
[bit2, bit0] LPM1, LPM0 (Low-power Mode)
These bits control the current consumption in the flash memory when accessing the flash memory.
However, the access time from the CPU to the flash memory greatly dependent upon the setting.
Therefore, the set values should be selected, depending on the CPU operating frequency.
01:
Low-power consumption mode
(Internal operating frequency operating at 4 MHz or less)
10:
Low-power consumption mode
(Internal operating frequency operating at 8 MHz or less)
11:
Low-power consumption mode
(Internal operating frequency operating at 10 MHz or less)
00:
Normal power consumption mode
(Internal operating frequency operating at 12.58 MHz or less)
Note:
The RDYINT bit and RDY bit are not changed simultaneously. Create a program using one of the
RDYINT bit or RDY bit for determination.
RDYINT bit
1 machine cycle
Automatic algorithm
RDY bit
Termination time
Summary of Contents for MB90460 Series
Page 1: ...The following document contains information on Cypress products ...
Page 3: ......
Page 5: ......
Page 9: ...iv ...
Page 41: ...22 CHAPTER 1 OVERVIEW ...
Page 45: ...26 CHAPTER 2 NOTES ON HANDLING DEVICES ...
Page 83: ...64 CHAPTER 3 CPU ...
Page 95: ...76 CHAPTER 4 RESET ...
Page 107: ...88 CHAPTER 5 CLOCK ...
Page 131: ...112 CHAPTER 6 LOW POWER CONSUMPTION MODE ...
Page 175: ...156 CHAPTER 7 INTERRUPT ...
Page 181: ...162 CHAPTER 8 MODE SETTING ...
Page 223: ...204 CHAPTER 9 I O PORT ...
Page 237: ...218 CHAPTER 10 TIME BASE TIMER ...
Page 247: ...228 CHAPTER 11 WATCHDOG TIMER ...
Page 275: ...256 CHAPTER 12 16 BIT RELOAD TIMER ...
Page 373: ...354 CHAPTER 14 MULTI FUNCTIONAL TIMER ...
Page 485: ...466 CHAPTER 16 PWC Timer ...
Page 531: ...512 CHAPTER 17 UART ...
Page 559: ...540 CHAPTER 19 DELAYED INTERRUPT GENERATOR MODULE ...
Page 589: ...570 CHAPTER 20 8 10 BIT A D CONVERTER ...
Page 601: ...582 CHAPTER 21 ROM CORRECTION FUNCTION ...
Page 633: ...614 CHAPTER 23 512K 1024K BIT FLASH MEMORY ...
Page 645: ...626 CHAPTER 24 EXAMPLE OF F2 MC 16LX MB90F462 F462A F463A CONNECTION FOR SERIAL WRITING ...
Page 715: ...696 APPENDIX ...
Page 716: ...697 INDEX INDEX The index follows on the next page This is listed in alphabetic order ...
Page 739: ......