Fujitsu MB90460 Series, Hardware Manual, Page: 203 / 739

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CHAPTER 9 I/O PORT
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Block Diagram of Port 3 Pins
Figure 9.6-1 is a block diagram of port 3 pins.
Figure 9.6-1 Block Diagram of Port 3 Pins
When the resource output enable bit is set, the port is forcibly caused to function as resource output pins
regardless of the value in the DDR3 register.
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Port 3 Registers
Port 3 registers are PDR3 and DDR3. The bits making up each register correspond to the port 3 pins on a
one-to-one basis. Table 9.6-2 lists the port 3 pins and their corresponding register bits.
Inter
nal
data bus
Port data register (PDR)
PDR read
PDR write
Output latch
DDR read
DDR write
Direction latch
Port data direction register (DDR)
Pin
Standby control (SPL = 1)
Resource output
Resource output enable
Table 9.6-2 Port 3 pins and their Corresponding Register Bits
Port Register bits and corresponding port pins
Port 3
PDR3, DDR3 bit15 bit14 bit13 bit12 bit11 bit10 bit9 bit8
Corresponding pin P37 P36 P35 P34 P33 P32 P31 P30