Fujitsu MB90460 Series, Hardware Manual, Page: 390 / 739

371
CHAPTER 15 MULTI-PULSE GENERATOR
(Continued)
Address:
Read/Write
Initial Value
15
14
13 12 11
10
9
8
CPCR
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
Compare Clear Register (Upper)
Address:
Read/Write
Initial Value
7
6
5
4
3
2 1
0
CPCR
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
Compare Clear Register (Lower)
Address: 003FFD
H
Read/Write
Initial Value
15 14 13 12
11
10
9 8
TMBR
R
0
R
0
R
0
R
0
R
0
R
0
R
0
R
0
Timer Buffer Register (Upper)
Address: 003FFC
H
Read/Write
Initial Value
7
6
5 4
3
2 1
0
TMBR
R
0
R
0
R
0
R
0
R
0
R
0
R
0
R
0
Timer Buffer Register (Lower)
003FFB
H
003FFA
H
_
CL12 CL11 CL10 CL09 CL08 CL13 CL14
CL07 CL06 CL05 CL04 CL03 CL02 CL01 CL00
T15 T13 T12 T11 T10 T09 T08
T07 T06 T05 T04 T03 T02 T01 T00
CL15
T14
Address: 00008F
H
Read/Write
Initial Value
15
14
13
12
11
10
9
8
NCCR
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
Timer Control Status Register
S21
S11 S10 S01 S00 D1 D0 S20
Address: 00008E
H
Read/Write
Initial Value
7
6
5
4
3
2 1 0
TCSR
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
Noise Cancellation Control Register
TCLR MODE ICLR ICRE
TMEN CLK2
CLK1 CLK0
bit
bit
bit
bit
bit
bit