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CHAPTER 20 8/10-BIT A/D CONVERTER
TMRD1 EQU 000088H ;16-bit reload register 1
;-------Main program------------------------------------------------------------------------------------------------
CODE CSEG
START: ;Assumes that the stack pointer (SP) has already
been initialized
AND CCR,#0BFH ;Disables interrupts
MOV ICR00,#08H ;Interrupt level: TMCSR1:L0 (highest priority)
MOV BAPL,#00H ;Sets the address to which conversion data is stored
MOV BAPM,#06H ;(Uses 600H to 617H.)
MOV BAPH,#00H ;
MOV ISCS,#19H ;Transfers word data, adds 1 to the address,
;transfers from I/O to memory, then ends by a
;resource request
MOV IOAL,#36H ;Sets the address of the analog data register as the
MOV IOAH,#00H ;transfer source address pointer
MOV DCTL,#0CH ;Transfers only channel 3 twelve times by EI
2
OS
MOV DDR5,#00000000B ;Sets P50 to P57 as input
MOV ADER,#00001000B ;Sets P53/AN3 as analog input
MOV ADCS0,#0DBH ;Stop conversion mode. Converts AN3 CH
MOV ADCS1,#0A8H ;Activates the 16-bit timer, starts A/D conversion,
and enables interrupts
MOV WTMRD1,#0320H ;Sets the timer value to 800 (320H), 100
µ
s
MOV TMCSRH1,#00H ;Sets the clock source to 125 ns and disables
external trigger
MOV TMCSRL1,#12H ;Disables timer output, disables interrupts, and
enables reload
MOV TMCSRL1,#13H ;Activates the 16-bit reload timer 1
MOV ILM,#07H ;Sets ILM in PS to level 7
OR CCR,#40H ;Enables interrupts
LOOP: MOVA,#00H ;Endless loop
MOVA,#01H
BRA LOOP
;-------Interrupt program-------------------------------------------------------------------------------------------------
ED_INT1:
MOV I:ADCS1,#80H ;Does not stop A/D conversion. Clears and disables
the interrupt flag
RETI ;Returns from interrupt
CODE ENDS
;-------Vector setting------------------------------------------------------------------------------------------------------
VECT CSEG ABS=0FFH
ORG0 FFD0H ;Sets vector for interrupt #11 (0BH)
DSL ED_INT1
ORG 0FFDCH ;Sets reset vector
DSL START
DB 00H ;Sets single-chip mode
VECT ENDS
END START
Summary of Contents for MB90460 Series
Page 1: ...The following document contains information on Cypress products ...
Page 3: ......
Page 5: ......
Page 9: ...iv ...
Page 41: ...22 CHAPTER 1 OVERVIEW ...
Page 45: ...26 CHAPTER 2 NOTES ON HANDLING DEVICES ...
Page 83: ...64 CHAPTER 3 CPU ...
Page 95: ...76 CHAPTER 4 RESET ...
Page 107: ...88 CHAPTER 5 CLOCK ...
Page 131: ...112 CHAPTER 6 LOW POWER CONSUMPTION MODE ...
Page 175: ...156 CHAPTER 7 INTERRUPT ...
Page 181: ...162 CHAPTER 8 MODE SETTING ...
Page 223: ...204 CHAPTER 9 I O PORT ...
Page 237: ...218 CHAPTER 10 TIME BASE TIMER ...
Page 247: ...228 CHAPTER 11 WATCHDOG TIMER ...
Page 275: ...256 CHAPTER 12 16 BIT RELOAD TIMER ...
Page 373: ...354 CHAPTER 14 MULTI FUNCTIONAL TIMER ...
Page 485: ...466 CHAPTER 16 PWC Timer ...
Page 531: ...512 CHAPTER 17 UART ...
Page 559: ...540 CHAPTER 19 DELAYED INTERRUPT GENERATOR MODULE ...
Page 589: ...570 CHAPTER 20 8 10 BIT A D CONVERTER ...
Page 601: ...582 CHAPTER 21 ROM CORRECTION FUNCTION ...
Page 633: ...614 CHAPTER 23 512K 1024K BIT FLASH MEMORY ...
Page 645: ...626 CHAPTER 24 EXAMPLE OF F2 MC 16LX MB90F462 F462A F463A CONNECTION FOR SERIAL WRITING ...
Page 715: ...696 APPENDIX ...
Page 716: ...697 INDEX INDEX The index follows on the next page This is listed in alphabetic order ...
Page 739: ......