Fujitsu MB90460 Series, Hardware Manual, Page: 333 / 739

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CHAPTER 14 MULTI-FUNCTIONAL TIMER
14.4.9 16-bit Timer Control Register (DTCR0/DTCR1/DTCR2)
16-bit timer control registers (DTCR0/DTCR1/DTCR2) are used to control the operation
mode, interrupt request enable, interrupt request flag, GATE signal enable and output
level polarity for the waveform generator.
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16-bit Timer Control Register (DTCR0/DTCR2)
Figure 14.4-20 16-bit Timer Control Register (DTCR1)
Address bit 7 6 5 4 3 2 1 0 Initial value
ch.0: 000056
H
ch.2: 000058
H
DMOD GTEN1 GTEN0 TMIF TMIE TMD2 TMD1 TMD0 00000000
B
R/W R/W R/W R/W R/W R/W R/W R/W
TMD2 TMD1 TMD0 Operation mode bit
0 0 0 Waveform generator is stopped.
0 0 1 PPG timer 0 output pulse while RT signal is “ H ” .
0 1 0
The rising edge of each RT signal will trigger
16-bit timer to start. PPG timer 0 output pulse
until the 16-bit timer stopped. (Timer mode)
1 0 0
Generate non-overlap signal by RT signal.
(Dead-time timer mode)
1 1 1
Generate non-overlap signal by PPG timer 0.
(Dead-time timer mode)
Others Prohibited
TMIE Interrupt request enable bit
0 Disable an interrupt when the 16-bit timer underflow
1 Enable an interrupt when the 16-bit timer underflow
TMIF
Interrupt request flag bit
Read Write
0 No counter underflow detected Clear this bit
1 Counter underflow detected No effect
GTEN0 GATE signal control bit 0
0 GATE signal is not controlled by RT0/RT4 (asynchronous mode)
1 GATE signal is controlled by RT0/RT4 (synchronous mode)
GTEN1 GATE signal control bit 1
0
GATE signal is not controlled by RT1/RT5 (asynchronous mode)
1 GATE signal is controlled by RT1/RT5 (synchronous mode)
DMOD Output polarity control bit
0 Normal polarity output
1 Inverted polarity output
R/W : Read and Write
: Initial value